diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2797-drm-amdgpu-move-validation-of-the-VM-size-into-the-V.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2797-drm-amdgpu-move-validation-of-the-VM-size-into-the-V.patch | 163 |
1 files changed, 163 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2797-drm-amdgpu-move-validation-of-the-VM-size-into-the-V.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2797-drm-amdgpu-move-validation-of-the-VM-size-into-the-V.patch new file mode 100644 index 00000000..3be89024 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2797-drm-amdgpu-move-validation-of-the-VM-size-into-the-V.patch @@ -0,0 +1,163 @@ +From 9766e1c28d17fc61aa387e6221e57fd13991df0b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Thu, 23 Nov 2017 12:57:18 +0100 +Subject: [PATCH 2797/4131] drm/amdgpu: move validation of the VM size into the + VM code +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This moves validation of the VM size parameter into amdgpu_vm_adjust_size(). + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 +--------------- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 13 +++++++++++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++- + drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 +++--- + 7 files changed, 20 insertions(+), 24 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 8aae933..020d7c4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -1115,22 +1115,8 @@ static void amdgpu_check_vm_size(struct amdgpu_device *adev) + if (amdgpu_vm_size < 1) { + dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n", + amdgpu_vm_size); +- goto def_value; ++ amdgpu_vm_size = -1; + } +- +- /* +- * Max GPUVM size for Cayman, SI, CI VI are 40 bits. +- */ +- if (amdgpu_vm_size > 1024) { +- dev_warn(adev->dev, "VM size (%d) too large, max is 1TB\n", +- amdgpu_vm_size); +- goto def_value; +- } +- +- return; +- +-def_value: +- amdgpu_vm_size = -1; + } + + /** +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 1b13d997..3fe455c 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -2617,13 +2617,22 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size) + * @vm_size: the default vm size if it's set auto + */ + void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size, +- uint32_t fragment_size_default, unsigned max_level) ++ uint32_t fragment_size_default, unsigned max_level, ++ unsigned max_bits) + { + uint64_t tmp; + + /* adjust vm size first */ +- if (amdgpu_vm_size != -1) ++ if (amdgpu_vm_size != -1) { ++ unsigned max_size = 1 << (max_bits - 30); ++ + vm_size = amdgpu_vm_size; ++ if (vm_size > max_size) { ++ dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n", ++ amdgpu_vm_size, max_size); ++ vm_size = max_size; ++ } ++ } + + adev->vm_manager.max_pfn = (uint64_t)vm_size << 18; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +index 7ad0b30..693f13f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +@@ -330,7 +330,8 @@ struct amdgpu_bo_va_mapping *amdgpu_vm_bo_lookup_mapping(struct amdgpu_vm *vm, + void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, + struct amdgpu_bo_va *bo_va); + void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size, +- uint32_t fragment_size_default, unsigned max_level); ++ uint32_t fragment_size_default, unsigned max_level, ++ unsigned max_bits); + int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); + bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring, + struct amdgpu_job *job); +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +index 5f5a593..daf46e4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +@@ -826,7 +826,7 @@ static int gmc_v6_0_sw_init(void *handle) + if (r) + return r; + +- amdgpu_vm_adjust_size(adev, 64, 9, 1); ++ amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); + + adev->mc.mc_mask = 0xffffffffffULL; + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +index 810f484..3c78948 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +@@ -967,7 +967,7 @@ static int gmc_v7_0_sw_init(void *handle) + * Currently set to 4GB ((1 << 20) 4k pages). + * Max GPUVM size for cayman and SI is 40 bits. + */ +- amdgpu_vm_adjust_size(adev, 64, 9, 1); ++ amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); + + /* Set the internal MC address mask + * This is the max address of the GPU's +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +index 4c7e517..5e8a796 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +@@ -1068,7 +1068,7 @@ static int gmc_v8_0_sw_init(void *handle) + * Currently set to 4GB ((1 << 20) 4k pages). + * Max GPUVM size for cayman and SI is 40 bits. + */ +- amdgpu_vm_adjust_size(adev, 64, 9, 1); ++ amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); + + /* Set the internal MC address mask + * This is the max address of the GPU's +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 57e71c6..cbca5cf 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -767,10 +767,10 @@ static int gmc_v9_0_sw_init(void *handle) + case CHIP_RAVEN: + adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; + if (adev->rev_id == 0x0 || adev->rev_id == 0x1) +- amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3); ++ amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); + else + /* vm_size is 64GB for legacy 2-level page support */ +- amdgpu_vm_adjust_size(adev, 64, 9, 1); ++ amdgpu_vm_adjust_size(adev, 64, 9, 1, 48); + break; + case CHIP_VEGA10: + /* XXX Don't know how to get VRAM type yet. */ +@@ -780,7 +780,7 @@ static int gmc_v9_0_sw_init(void *handle) + * vm size is 256TB (48bit), maximum size of Vega10, + * block size 512 (9bit) + */ +- amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3); ++ amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); + break; + default: + break; +-- +2.7.4 + |