diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2774-drm-amd-display-Only-update-output-transfer-function.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2774-drm-amd-display-Only-update-output-transfer-function.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2774-drm-amd-display-Only-update-output-transfer-function.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2774-drm-amd-display-Only-update-output-transfer-function.patch new file mode 100644 index 00000000..6f3e8701 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2774-drm-amd-display-Only-update-output-transfer-function.patch @@ -0,0 +1,68 @@ +From c7bfe278539281042e6884f867019933da3a073b Mon Sep 17 00:00:00 2001 +From: Yongqiang Sun <yongqiang.sun@amd.com> +Date: Fri, 10 Nov 2017 15:40:52 -0500 +Subject: [PATCH 2774/4131] drm/amd/display: Only update output transfer + function for full type. + +dcn10_translate_regamma_to_hw_format costs 750us to run, it cannot be +called within isr, check update flag before calling, only do it for +full update. + +Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 23 +++++++++++++++------- + 1 file changed, 16 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index b7cb8e0..fa9d3e9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -1211,9 +1211,17 @@ dcn10_set_output_transfer_func(struct pipe_ctx *pipe_ctx, + stream->out_transfer_func->type == TF_TYPE_PREDEFINED && + stream->out_transfer_func->tf == TRANSFER_FUNCTION_SRGB) + dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_SRGB); +- else if (dcn10_translate_regamma_to_hw_format(stream->out_transfer_func, &dpp->regamma_params)) +- dpp->funcs->dpp_program_regamma_pwl(dpp, &dpp->regamma_params, OPP_REGAMMA_USER); +- else ++ ++ /* dcn10_translate_regamma_to_hw_format takes 750us, only do it when full ++ * update. ++ */ ++ else if (dcn10_translate_regamma_to_hw_format( ++ stream->out_transfer_func, ++ &dpp->regamma_params)) { ++ dpp->funcs->dpp_program_regamma_pwl( ++ dpp, ++ &dpp->regamma_params, OPP_REGAMMA_USER); ++ } else + dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_BYPASS); + + return true; +@@ -2076,16 +2084,17 @@ static void program_all_pipe_in_tree( + + update_dchubp_dpp(dc, pipe_ctx, context); + +- if (cur_pipe_ctx->plane_state != pipe_ctx->plane_state) { ++ if (cur_pipe_ctx->plane_state != pipe_ctx->plane_state) + dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state); +- } + +- /* ++ /* dcn10_translate_regamma_to_hw_format takes 750us to finish ++ * only do gamma programming for full update. + * TODO: This can be further optimized/cleaned up + * Always call this for now since it does memcmp inside before + * doing heavy calculation and programming + */ +- dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream); ++ if (pipe_ctx->plane_state->update_flags.bits.full_update) ++ dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream); + } + + if (dc->debug.sanity_checks) { +-- +2.7.4 + |