1 files changed, 88 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2714-drm-amd-display-call-set-csc_default-if-enable-adjus.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2714-drm-amd-display-call-set-csc_default-if-enable-adjus.patch
new file mode 100644
index 00000000..eaae2db4
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2714-drm-amd-display-call-set-csc_default-if-enable-adjus.patch
@@ -0,0 +1,88 @@
+From 24ec2b6ef29e1afe7f713e55cffd91811aef0a27 Mon Sep 17 00:00:00 2001
+From: Yue Hin Lau <Yuehin.Lau@amd.com>
+Date: Fri, 27 Oct 2017 15:28:38 -0400
+Subject: [PATCH 2714/4131] drm/amd/display: call set csc_default if enable
+ adjustment is false
+
+Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
+Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
+Acked-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h          | 2 +-
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c       | 6 ++----
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 ++
+ drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h               | 2 +-
+ 4 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
+index 8b894eb..4355cc2 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
+@@ -1381,7 +1381,7 @@ void dpp1_cm_set_output_csc_adjustment(
+ 
+ void dpp1_cm_set_output_csc_default(
+ 		struct dpp *dpp_base,
+-		const struct default_adjustment *default_adjust);
++		enum dc_color_space colorspace);
+ 
+ void dpp1_cm_set_gamut_remap(
+ 	struct dpp *dpp,
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+index 9cb44c9..bb430c0 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+@@ -225,14 +225,13 @@ void dpp1_cm_set_gamut_remap(
+ 
+ void dpp1_cm_set_output_csc_default(
+ 		struct dpp *dpp_base,
+-		const struct default_adjustment *default_adjust)
++		enum dc_color_space colorspace)
+ {
+ 
+ 	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
+ 	uint32_t ocsc_mode = 0;
+ 
+-	if (default_adjust != NULL) {
+-		switch (default_adjust->out_color_space) {
++	switch (colorspace) {
+ 		case COLOR_SPACE_SRGB:
+ 		case COLOR_SPACE_2020_RGB_FULLRANGE:
+ 			ocsc_mode = 0;
+@@ -253,7 +252,6 @@ void dpp1_cm_set_output_csc_default(
+ 		case COLOR_SPACE_UNKNOWN:
+ 		default:
+ 			break;
+-		}
+ 	}
+ 
+ 	REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+index 7579e51..81192d6 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+@@ -1608,6 +1608,8 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx,
+ 			tbl_entry.color_space = color_space;
+ 			//tbl_entry.regval = matrix;
+ 			pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry);
++	} else {
++		pipe_ctx->plane_res.dpp->funcs->opp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);
+ 	}
+ }
+ 
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+index 71078d1..3b1486c 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+@@ -64,7 +64,7 @@ struct dpp_funcs {
+ 
+ 	void (*opp_set_csc_default)(
+ 		struct dpp *dpp,
+-		const struct default_adjustment *default_adjust);
++		enum dc_color_space colorspace);
+ 
+ 	void (*opp_set_csc_adjustment)(
+ 		struct dpp *dpp,
+-- 
+2.7.4
+