diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2636-drm-amd-Add-DCE12-resource-strap-registers.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2636-drm-amd-Add-DCE12-resource-strap-registers.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2636-drm-amd-Add-DCE12-resource-strap-registers.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2636-drm-amd-Add-DCE12-resource-strap-registers.patch new file mode 100644 index 00000000..485e0570 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2636-drm-amd-Add-DCE12-resource-strap-registers.patch @@ -0,0 +1,53 @@ +From 9825fd0e127719ca160ce8403679ea85df17a848 Mon Sep 17 00:00:00 2001 +From: "Leo (Sunpeng) Li" <sunpeng.li@amd.com> +Date: Tue, 31 Oct 2017 16:28:57 -0400 +Subject: [PATCH 2636/4131] drm/amd: Add DCE12 resource strap registers + +We need them for initializing audio properly. + +Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> +Reviewed-by: Harry Wentland <harry.wentland@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h | 4 ++++ + drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h | 8 ++++++++ + 2 files changed, 12 insertions(+) + +diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h +index 75b660d..f730d06 100644 +--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h +@@ -1841,6 +1841,10 @@ + #define mmUNIPHYG_CHANNEL_XBAR_CNTL_BASE_IDX 2 + #define mmDCIO_WRCMD_DELAY 0x2094 + #define mmDCIO_WRCMD_DELAY_BASE_IDX 2 ++#define mmDC_PINSTRAPS 0x2096 ++#define mmDC_PINSTRAPS_BASE_IDX 2 ++#define mmCC_DC_MISC_STRAPS 0x2097 ++#define mmCC_DC_MISC_STRAPS_BASE_IDX 2 + #define mmDC_DVODATA_CONFIG 0x2098 + #define mmDC_DVODATA_CONFIG_BASE_IDX 2 + #define mmLVTMA_PWRSEQ_CNTL 0x2099 +diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h +index d8ad862..6d3162c 100644 +--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h +@@ -2447,6 +2447,14 @@ + //DCCG_CBUS_WRCMD_DELAY + #define DCCG_CBUS_WRCMD_DELAY__CBUS_PLL_WRCMD_DELAY__SHIFT 0x0 + #define DCCG_CBUS_WRCMD_DELAY__CBUS_PLL_WRCMD_DELAY_MASK 0x0000000FL ++//DC_PINSTRAPS ++#define DC_PINSTRAPS__DC_PINSTRAPS_AUDIO__SHIFT 0xe ++#define DC_PINSTRAPS__DC_PINSTRAPS_AUDIO_MASK 0x0000C000L ++//CC_DC_MISC_STRAPS ++#define CC_DC_MISC_STRAPS__HDMI_DISABLE__SHIFT 0x6 ++#define CC_DC_MISC_STRAPS__AUDIO_STREAM_NUMBER__SHIFT 0x8 ++#define CC_DC_MISC_STRAPS__HDMI_DISABLE_MASK 0x00000040L ++#define CC_DC_MISC_STRAPS__AUDIO_STREAM_NUMBER_MASK 0x00000700L + //DCCG_DS_DTO_INCR + #define DCCG_DS_DTO_INCR__DCCG_DS_DTO_INCR__SHIFT 0x0 + #define DCCG_DS_DTO_INCR__DCCG_DS_DTO_INCR_MASK 0xFFFFFFFFL +-- +2.7.4 + |