diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2627-drm-amd-display-fix-high-part-address-in-dm_plane_he.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2627-drm-amd-display-fix-high-part-address-in-dm_plane_he.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2627-drm-amd-display-fix-high-part-address-in-dm_plane_he.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2627-drm-amd-display-fix-high-part-address-in-dm_plane_he.patch new file mode 100644 index 00000000..d3b8659f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2627-drm-amd-display-fix-high-part-address-in-dm_plane_he.patch @@ -0,0 +1,58 @@ +From a5fe607876af68438b9abaf3e63555286a25a7d6 Mon Sep 17 00:00:00 2001 +From: Shirish S <shirish.s@amd.com> +Date: Thu, 26 Oct 2017 16:15:01 +0530 +Subject: [PATCH 2627/4131] drm/amd/display: fix high part address in + dm_plane_helper_prepare_fb() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The high part calculation of luma and chroma address' was +missing in dm_plane_helper_prepare_fb(). + +This fix brings uniformity in the address' at atomic_check +and atomic_commit for both RGB & YUV planes. + +Signed-off-by: Shirish S <shirish.s@amd.com> +Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 22eed1a..b5af98d 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -3063,6 +3063,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, + struct amdgpu_framebuffer *afb; + struct drm_gem_object *obj; + struct amdgpu_bo *rbo; ++ uint64_t chroma_addr = 0; + int r; + struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old; + unsigned int awidth; +@@ -3104,11 +3105,16 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, + plane_state->address.grph.addr.high_part = upper_32_bits(afb->address); + } else { + awidth = ALIGN(new_state->fb->width, 64); ++ plane_state->address.type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE; + plane_state->address.video_progressive.luma_addr.low_part + = lower_32_bits(afb->address); ++ plane_state->address.video_progressive.luma_addr.high_part ++ = upper_32_bits(afb->address); ++ chroma_addr = afb->address + (u64)(awidth * new_state->fb->height); + plane_state->address.video_progressive.chroma_addr.low_part +- = lower_32_bits(afb->address) + +- (awidth * new_state->fb->height); ++ = lower_32_bits(chroma_addr); ++ plane_state->address.video_progressive.chroma_addr.high_part ++ = upper_32_bits(chroma_addr); + } + } + +-- +2.7.4 + |