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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2483-drm-amd-display-update-blending-mode-and-set-output-.patch77
1 files changed, 77 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2483-drm-amd-display-update-blending-mode-and-set-output-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2483-drm-amd-display-update-blending-mode-and-set-output-.patch
new file mode 100644
index 00000000..0a184851
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2483-drm-amd-display-update-blending-mode-and-set-output-.patch
@@ -0,0 +1,77 @@
+From 7671510215773d15c55cf957556e9da325a73950 Mon Sep 17 00:00:00 2001
+From: Eric Bernstein <eric.bernstein@amd.com>
+Date: Thu, 14 Sep 2017 18:01:40 -0400
+Subject: [PATCH 2483/4131] drm/amd/display: update blending mode and set
+ output denorm
+
+Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Harry Wentland <Harry.Wentland@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 27 +++++++++++++++++++++++-
+ drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 4 ++++
+ 2 files changed, 30 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+index 6e56fa3..334f072 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+@@ -313,10 +313,34 @@ static int mpc10_mpcc_add(struct mpc *mpc, struct mpcc_cfg *cfg)
+ return mpcc_id;
+ }
+
++static void mpc10_update_blend_mode(
++ struct mpc *mpc,
++ struct mpcc_cfg *cfg)
++{
++ struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc);
++ int mpcc_id, z_idx;
++ int alpha_blnd_mode = cfg->per_pixel_alpha ?
++ BLND_PP_ALPHA : BLND_GLOBAL_ALPHA;
++
++ /* find z_idx for the dpp that requires blending mode update*/
++ for (z_idx = 0; z_idx < cfg->tree_cfg->num_pipes; z_idx++)
++ if (cfg->tree_cfg->dpp[z_idx] == cfg->dpp_id)
++ break;
++
++ ASSERT(z_idx < cfg->tree_cfg->num_pipes);
++ mpcc_id = cfg->tree_cfg->mpcc[z_idx];
++
++ REG_UPDATE_2(MPCC_CONTROL[mpcc_id],
++ MPCC_ALPHA_BLND_MODE, alpha_blnd_mode,
++ MPCC_ALPHA_MULTIPLIED_MODE, cfg->pre_multiplied_alpha);
++}
++
+ const struct mpc_funcs dcn10_mpc_funcs = {
+ .add = mpc10_mpcc_add,
+ .remove = mpc10_mpcc_remove,
+- .wait_for_idle = mpc10_assert_idle_mpcc
++ .wait_for_idle = mpc10_assert_idle_mpcc,
++ .set_denorm = NULL,
++ .update_blend_mode = mpc10_update_blend_mode
+ };
+
+ void dcn10_mpc_construct(struct dcn10_mpc *mpc10,
+@@ -337,3 +361,4 @@ void dcn10_mpc_construct(struct dcn10_mpc *mpc10,
+ mpc10->mpcc_in_use_mask = 0;
+ mpc10->num_mpcc = num_mpcc;
+ }
++
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
+index 2d3de5b..fb590f5 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
+@@ -51,6 +51,10 @@ struct mpc_funcs {
+ int opp_id,
+ int mpcc_inst);
+ void (*wait_for_idle)(struct mpc *mpc, int id);
++ void (*set_denorm)(struct mpc *mpc,
++ int opp_id,
++ enum dc_color_depth output_depth);
++ void (*update_blend_mode)(struct mpc *mpc, struct mpcc_cfg *cfg);
+ };
+
+ #endif
+--
+2.7.4
+