diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2471-drm-amd-display-Refactor-dcn10_dpp_cm_helper-to-dcn1.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2471-drm-amd-display-Refactor-dcn10_dpp_cm_helper-to-dcn1.patch | 521 |
1 files changed, 521 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2471-drm-amd-display-Refactor-dcn10_dpp_cm_helper-to-dcn1.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2471-drm-amd-display-Refactor-dcn10_dpp_cm_helper-to-dcn1.patch new file mode 100644 index 00000000..39758667 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2471-drm-amd-display-Refactor-dcn10_dpp_cm_helper-to-dcn1.patch @@ -0,0 +1,521 @@ +From 0b6ab9de4041ae563dac43c09cd34fe82e6c5789 Mon Sep 17 00:00:00 2001 +From: Yue Hin Lau <Yuehin.Lau@amd.com> +Date: Mon, 11 Sep 2017 14:30:02 -0400 +Subject: [PATCH 2471/4131] drm/amd/display: Refactor dcn10_dpp_cm_helper to + dcn10_cm_common + +Change-Id: Ib7c89226596ba1eb8dccea896812e414fb4f4eec +Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/Makefile | 2 +- + .../gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c | 123 +++++++++++++++++++++ + .../gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h | 99 +++++++++++++++++ + .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 2 +- + .../drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c | 123 --------------------- + .../drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h | 99 ----------------- + 6 files changed, 224 insertions(+), 224 deletions(-) + create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c + create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h + delete mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c + delete mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/Makefile b/drivers/gpu/drm/amd/display/dc/dcn10/Makefile +index 2d6d3a3..6b19106 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/Makefile ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/Makefile +@@ -4,7 +4,7 @@ + DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \ + dcn10_dpp.o dcn10_opp.o dcn10_timing_generator.o \ + dcn10_mem_input.o dcn10_mpc.o \ +- dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_dpp_cm_helper.o ++ dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o + + AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10)) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c +new file mode 100644 +index 0000000..7f579cb +--- /dev/null ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c +@@ -0,0 +1,123 @@ ++/* ++ * Copyright 2016 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#include "reg_helper.h" ++#include "dcn10_dpp.h" ++ ++#include "dcn10_cm_common.h" ++ ++#define REG(reg) reg ++ ++#define CTX \ ++ ctx ++ ++#undef FN ++#define FN(reg_name, field_name) \ ++ reg->shifts.field_name, reg->masks.field_name ++ ++void cm_helper_program_color_matrices( ++ struct dc_context *ctx, ++ const uint16_t *regval, ++ const struct color_matrices_reg *reg) ++{ ++ uint32_t cur_csc_reg; ++ unsigned int i = 0; ++ ++ for (cur_csc_reg = reg->csc_c11_c12; ++ cur_csc_reg <= reg->csc_c33_c34; ++ cur_csc_reg++) { ++ ++ const uint16_t *regval0 = &(regval[2 * i]); ++ const uint16_t *regval1 = &(regval[(2 * i) + 1]); ++ ++ REG_SET_2(cur_csc_reg, 0, ++ csc_c11, *regval0, ++ csc_c12, *regval1); ++ ++ i++; ++ } ++ ++} ++ ++void cm_helper_program_xfer_func( ++ struct dc_context *ctx, ++ const struct pwl_params *params, ++ const struct xfer_func_reg *reg) ++{ ++ uint32_t reg_region_cur; ++ unsigned int i = 0; ++ ++ REG_SET_2(reg->start_cntl_b, 0, ++ exp_region_start, params->arr_points[0].custom_float_x, ++ exp_resion_start_segment, 0); ++ REG_SET_2(reg->start_cntl_g, 0, ++ exp_region_start, params->arr_points[0].custom_float_x, ++ exp_resion_start_segment, 0); ++ REG_SET_2(reg->start_cntl_r, 0, ++ exp_region_start, params->arr_points[0].custom_float_x, ++ exp_resion_start_segment, 0); ++ ++ REG_SET(reg->start_slope_cntl_b, 0, ++ field_region_linear_slope, params->arr_points[0].custom_float_slope); ++ REG_SET(reg->start_slope_cntl_g, 0, ++ field_region_linear_slope, params->arr_points[0].custom_float_slope); ++ REG_SET(reg->start_slope_cntl_r, 0, ++ field_region_linear_slope, params->arr_points[0].custom_float_slope); ++ ++ REG_SET(reg->start_end_cntl1_b, 0, ++ field_region_end, params->arr_points[1].custom_float_x); ++ REG_SET_2(reg->start_end_cntl2_b, 0, ++ field_region_end_slope, params->arr_points[1].custom_float_slope, ++ field_region_end_base, params->arr_points[1].custom_float_y); ++ ++ REG_SET(reg->start_end_cntl1_g, 0, ++ field_region_end, params->arr_points[1].custom_float_x); ++ REG_SET_2(reg->start_end_cntl2_g, 0, ++ field_region_end_slope, params->arr_points[1].custom_float_slope, ++ field_region_end_base, params->arr_points[1].custom_float_y); ++ ++ REG_SET(reg->start_end_cntl1_r, 0, ++ field_region_end, params->arr_points[1].custom_float_x); ++ REG_SET_2(reg->start_end_cntl2_r, 0, ++ field_region_end_slope, params->arr_points[1].custom_float_slope, ++ field_region_end_base, params->arr_points[1].custom_float_y); ++ ++ for (reg_region_cur = reg->region_start; ++ reg_region_cur <= reg->region_end; ++ reg_region_cur++) { ++ ++ const struct gamma_curve *curve0 = &(params->arr_curve_points[2 * i]); ++ const struct gamma_curve *curve1 = &(params->arr_curve_points[(2 * i) + 1]); ++ ++ REG_SET_4(reg_region_cur, 0, ++ exp_region0_lut_offset, curve0->offset, ++ exp_region0_num_segments, curve0->segments_num, ++ exp_region1_lut_offset, curve1->offset, ++ exp_region1_num_segments, curve1->segments_num); ++ ++ i++; ++ } ++ ++} +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h +new file mode 100644 +index 0000000..64836dc +--- /dev/null ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h +@@ -0,0 +1,99 @@ ++/* ++ * Copyright 2016 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#ifndef __DAL_DCN10_CM_COMMON_H__ ++#define __DAL_DCN10_CM_COMMON_H__ ++ ++#define TF_HELPER_REG_FIELD_LIST(type) \ ++ type exp_region0_lut_offset; \ ++ type exp_region0_num_segments; \ ++ type exp_region1_lut_offset; \ ++ type exp_region1_num_segments;\ ++ type field_region_end;\ ++ type field_region_end_slope;\ ++ type field_region_end_base;\ ++ type exp_region_start;\ ++ type exp_resion_start_segment;\ ++ type field_region_linear_slope ++ ++#define TF_CM_REG_FIELD_LIST(type) \ ++ type csc_c11; \ ++ type csc_c12 ++ ++struct xfer_func_shift { ++ TF_HELPER_REG_FIELD_LIST(uint8_t); ++}; ++ ++struct xfer_func_mask { ++ TF_HELPER_REG_FIELD_LIST(uint32_t); ++}; ++ ++struct xfer_func_reg { ++ struct xfer_func_shift shifts; ++ struct xfer_func_mask masks; ++ ++ uint32_t start_cntl_b; ++ uint32_t start_cntl_g; ++ uint32_t start_cntl_r; ++ uint32_t start_slope_cntl_b; ++ uint32_t start_slope_cntl_g; ++ uint32_t start_slope_cntl_r; ++ uint32_t start_end_cntl1_b; ++ uint32_t start_end_cntl2_b; ++ uint32_t start_end_cntl1_g; ++ uint32_t start_end_cntl2_g; ++ uint32_t start_end_cntl1_r; ++ uint32_t start_end_cntl2_r; ++ uint32_t region_start; ++ uint32_t region_end; ++}; ++ ++struct cm_color_matrix_shift { ++ TF_CM_REG_FIELD_LIST(uint8_t); ++}; ++ ++struct cm_color_matrix_mask { ++ TF_CM_REG_FIELD_LIST(uint32_t); ++}; ++ ++struct color_matrices_reg{ ++ struct cm_color_matrix_shift shifts; ++ struct cm_color_matrix_mask masks; ++ ++ uint32_t csc_c11_c12; ++ uint32_t csc_c33_c34; ++}; ++ ++void cm_helper_program_color_matrices( ++ struct dc_context *ctx, ++ const uint16_t *regval, ++ const struct color_matrices_reg *reg); ++ ++void cm_helper_program_xfer_func( ++ struct dc_context *ctx, ++ const struct pwl_params *params, ++ const struct xfer_func_reg *reg); ++ ++#endif +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c +index d0e72ac..61e2a89 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c +@@ -29,8 +29,8 @@ + + #include "reg_helper.h" + #include "dcn10_dpp.h" +-#include "dcn10_dpp_cm_helper.h" + #include "basics/conversion.h" ++#include "dcn10_cm_common.h" + + #define NUM_PHASES 64 + #define HORZ_MAX_TAPS 8 +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c +deleted file mode 100644 +index f616e08..0000000 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c ++++ /dev/null +@@ -1,123 +0,0 @@ +-/* +- * Copyright 2016 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#include "reg_helper.h" +-#include "dcn10_dpp.h" +- +-#include "dcn10_dpp_cm_helper.h" +- +-#define REG(reg) reg +- +-#define CTX \ +- ctx +- +-#undef FN +-#define FN(reg_name, field_name) \ +- reg->shifts.field_name, reg->masks.field_name +- +-void cm_helper_program_color_matrices( +- struct dc_context *ctx, +- const uint16_t *regval, +- const struct color_matrices_reg *reg) +-{ +- uint32_t cur_csc_reg; +- unsigned int i = 0; +- +- for (cur_csc_reg = reg->csc_c11_c12; +- cur_csc_reg <= reg->csc_c33_c34; +- cur_csc_reg++) { +- +- const uint16_t *regval0 = &(regval[2 * i]); +- const uint16_t *regval1 = &(regval[(2 * i) + 1]); +- +- REG_SET_2(cur_csc_reg, 0, +- csc_c11, *regval0, +- csc_c12, *regval1); +- +- i++; +- } +- +-} +- +-void cm_helper_program_xfer_func( +- struct dc_context *ctx, +- const struct pwl_params *params, +- const struct xfer_func_reg *reg) +-{ +- uint32_t reg_region_cur; +- unsigned int i = 0; +- +- REG_SET_2(reg->start_cntl_b, 0, +- exp_region_start, params->arr_points[0].custom_float_x, +- exp_resion_start_segment, 0); +- REG_SET_2(reg->start_cntl_g, 0, +- exp_region_start, params->arr_points[0].custom_float_x, +- exp_resion_start_segment, 0); +- REG_SET_2(reg->start_cntl_r, 0, +- exp_region_start, params->arr_points[0].custom_float_x, +- exp_resion_start_segment, 0); +- +- REG_SET(reg->start_slope_cntl_b, 0, +- field_region_linear_slope, params->arr_points[0].custom_float_slope); +- REG_SET(reg->start_slope_cntl_g, 0, +- field_region_linear_slope, params->arr_points[0].custom_float_slope); +- REG_SET(reg->start_slope_cntl_r, 0, +- field_region_linear_slope, params->arr_points[0].custom_float_slope); +- +- REG_SET(reg->start_end_cntl1_b, 0, +- field_region_end, params->arr_points[1].custom_float_x); +- REG_SET_2(reg->start_end_cntl2_b, 0, +- field_region_end_slope, params->arr_points[1].custom_float_slope, +- field_region_end_base, params->arr_points[1].custom_float_y); +- +- REG_SET(reg->start_end_cntl1_g, 0, +- field_region_end, params->arr_points[1].custom_float_x); +- REG_SET_2(reg->start_end_cntl2_g, 0, +- field_region_end_slope, params->arr_points[1].custom_float_slope, +- field_region_end_base, params->arr_points[1].custom_float_y); +- +- REG_SET(reg->start_end_cntl1_r, 0, +- field_region_end, params->arr_points[1].custom_float_x); +- REG_SET_2(reg->start_end_cntl2_r, 0, +- field_region_end_slope, params->arr_points[1].custom_float_slope, +- field_region_end_base, params->arr_points[1].custom_float_y); +- +- for (reg_region_cur = reg->region_start; +- reg_region_cur <= reg->region_end; +- reg_region_cur++) { +- +- const struct gamma_curve *curve0 = &(params->arr_curve_points[2 * i]); +- const struct gamma_curve *curve1 = &(params->arr_curve_points[(2 * i) + 1]); +- +- REG_SET_4(reg_region_cur, 0, +- exp_region0_lut_offset, curve0->offset, +- exp_region0_num_segments, curve0->segments_num, +- exp_region1_lut_offset, curve1->offset, +- exp_region1_num_segments, curve1->segments_num); +- +- i++; +- } +- +-} +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h +deleted file mode 100644 +index 1155ee5..0000000 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h ++++ /dev/null +@@ -1,99 +0,0 @@ +-/* +- * Copyright 2016 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_DPP_DCN10_CM_HELPER_H__ +-#define __DAL_DPP_DCN10_CM_HELPER_H__ +- +-#define TF_HELPER_REG_FIELD_LIST(type) \ +- type exp_region0_lut_offset; \ +- type exp_region0_num_segments; \ +- type exp_region1_lut_offset; \ +- type exp_region1_num_segments;\ +- type field_region_end;\ +- type field_region_end_slope;\ +- type field_region_end_base;\ +- type exp_region_start;\ +- type exp_resion_start_segment;\ +- type field_region_linear_slope +- +-#define TF_CM_REG_FIELD_LIST(type) \ +- type csc_c11; \ +- type csc_c12 +- +-struct xfer_func_shift { +- TF_HELPER_REG_FIELD_LIST(uint8_t); +-}; +- +-struct xfer_func_mask { +- TF_HELPER_REG_FIELD_LIST(uint32_t); +-}; +- +-struct xfer_func_reg { +- struct xfer_func_shift shifts; +- struct xfer_func_mask masks; +- +- uint32_t start_cntl_b; +- uint32_t start_cntl_g; +- uint32_t start_cntl_r; +- uint32_t start_slope_cntl_b; +- uint32_t start_slope_cntl_g; +- uint32_t start_slope_cntl_r; +- uint32_t start_end_cntl1_b; +- uint32_t start_end_cntl2_b; +- uint32_t start_end_cntl1_g; +- uint32_t start_end_cntl2_g; +- uint32_t start_end_cntl1_r; +- uint32_t start_end_cntl2_r; +- uint32_t region_start; +- uint32_t region_end; +-}; +- +-struct cm_color_matrix_shift { +- TF_CM_REG_FIELD_LIST(uint8_t); +-}; +- +-struct cm_color_matrix_mask { +- TF_CM_REG_FIELD_LIST(uint32_t); +-}; +- +-struct color_matrices_reg{ +- struct cm_color_matrix_shift shifts; +- struct cm_color_matrix_mask masks; +- +- uint32_t csc_c11_c12; +- uint32_t csc_c33_c34; +-}; +- +-void cm_helper_program_color_matrices( +- struct dc_context *ctx, +- const uint16_t *regval, +- const struct color_matrices_reg *reg); +- +-void cm_helper_program_xfer_func( +- struct dc_context *ctx, +- const struct pwl_params *params, +- const struct xfer_func_reg *reg); +- +-#endif +-- +2.7.4 + |