diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2382-drm-amd-display-Update-include-to-bring-in-line-with.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2382-drm-amd-display-Update-include-to-bring-in-line-with.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2382-drm-amd-display-Update-include-to-bring-in-line-with.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2382-drm-amd-display-Update-include-to-bring-in-line-with.patch new file mode 100644 index 00000000..de5e7fb9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2382-drm-amd-display-Update-include-to-bring-in-line-with.patch @@ -0,0 +1,40 @@ +From 734864684ccf392391593613a926e4ff90657790 Mon Sep 17 00:00:00 2001 +From: Harry Wentland <harry.wentland@amd.com> +Date: Fri, 8 Sep 2017 10:25:25 -0400 +Subject: [PATCH 2382/4131] drm/amd/display: Update include to bring in line + with internal tree + +Signed-off-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 + + drivers/gpu/drm/amd/display/include/dal_asic_id.h | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index c8c4b95..c4875c3 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -40,6 +40,7 @@ + #include "ipp.h" + #include "mpc.h" + #include "reg_helper.h" ++#include "custom_float.h" + + #define CTX \ + hws->ctx +diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h +index 14e3146..7abe663 100644 +--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h ++++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h +@@ -112,6 +112,7 @@ + /* DCN1_0 */ + #define INTERNAL_REV_RAVEN_A0 0x00 /* First spin of Raven */ + #define RAVEN_A0 0x01 ++#define RAVEN_B0 0x21 + #define RAVEN_UNKNOWN 0xFF + + #define ASIC_REV_IS_RAVEN(eChipRev) ((eChipRev >= RAVEN_A0) && eChipRev < RAVEN_UNKNOWN) +-- +2.7.4 + |