diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2238-drm-amdgpu-fix-VA-hole-handling-on-Vega10-v3.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2238-drm-amdgpu-fix-VA-hole-handling-on-Vega10-v3.patch | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2238-drm-amdgpu-fix-VA-hole-handling-on-Vega10-v3.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2238-drm-amdgpu-fix-VA-hole-handling-on-Vega10-v3.patch new file mode 100644 index 00000000..f64a3534 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2238-drm-amdgpu-fix-VA-hole-handling-on-Vega10-v3.patch @@ -0,0 +1,128 @@ +From 0f95f0e71eae69db8581ac1e6dce6df1e9eef6e9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 6 Nov 2017 15:37:01 +0100 +Subject: [PATCH 2238/4131] drm/amdgpu: fix VA hole handling on Vega10 v3 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Similar to the CPU address space the VA on Vega10 has a hole in it. + +v2: use dev_dbg instead of dev_err +v3: add some more comments to explain how the hw works + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +CC: stable@vger.kernel.org +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +++++----- + drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 13 +++++++++++++ + 4 files changed, 32 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +index 3bc81e9..35818a3 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +@@ -909,8 +909,8 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, + struct amdgpu_bo_va_mapping *m; + struct amdgpu_bo *aobj = NULL; + struct amdgpu_cs_chunk *chunk; ++ uint64_t offset, va_start; + struct amdgpu_ib *ib; +- uint64_t offset; + uint8_t *kptr; + + chunk = &p->chunks[i]; +@@ -920,14 +920,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, + if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB) + continue; + +- r = amdgpu_cs_find_mapping(p, chunk_ib->va_start, +- &aobj, &m); ++ va_start = chunk_ib->va_start & AMDGPU_VA_HOLE_MASK; ++ r = amdgpu_cs_find_mapping(p, va_start, &aobj, &m); + if (r) { + DRM_ERROR("IB va_start is invalid\n"); + return r; + } + +- if ((chunk_ib->va_start + chunk_ib->ib_bytes) > ++ if ((va_start + chunk_ib->ib_bytes) > + (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) { + DRM_ERROR("IB va_start+ib_bytes is invalid\n"); + return -EINVAL; +@@ -940,7 +940,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, + } + + offset = m->start * AMDGPU_GPU_PAGE_SIZE; +- kptr += chunk_ib->va_start - offset; ++ kptr += va_start - offset; + + memcpy(ib->ptr, kptr, chunk_ib->ib_bytes); + amdgpu_bo_kunmap(aobj); +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +index d85a6eb..4d154dd70 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +@@ -736,6 +736,17 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, + return -EINVAL; + } + ++ if (args->va_address >= AMDGPU_VA_HOLE_START && ++ args->va_address < AMDGPU_VA_HOLE_END) { ++ dev_dbg(&dev->pdev->dev, ++ "va_address 0x%LX is in VA hole 0x%LX-0x%LX\n", ++ args->va_address, AMDGPU_VA_HOLE_START, ++ AMDGPU_VA_HOLE_END); ++ return -EINVAL; ++ } ++ ++ args->va_address &= AMDGPU_VA_HOLE_MASK; ++ + if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) { + dev_err(&dev->pdev->dev, "invalid flags combination 0x%08X\n", + args->flags); +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +index be79ffe..f978739 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +@@ -618,7 +618,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file + if (amdgpu_sriov_vf(adev)) + dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; + dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE; +- dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; ++ dev_info.virtual_address_max = ++ min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE, ++ AMDGPU_VA_HOLE_START); + dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); + dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; + dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +index 6d1f7b0..2f9eb95 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +@@ -96,6 +96,19 @@ struct amdgpu_bo_list_entry; + /* hardcode that limit for now */ + #define AMDGPU_VA_RESERVED_SIZE (8ULL << 20) + ++/* VA hole for 48bit addresses on Vega10 */ ++#define AMDGPU_VA_HOLE_START 0x0000800000000000ULL ++#define AMDGPU_VA_HOLE_END 0xffff800000000000ULL ++ ++/* ++ * Hardware is programmed as if the hole doesn't exists with start and end ++ * address values. ++ * ++ * This mask is used to remove the upper 16bits of the VA and so come up with ++ * the linear addr value. ++ */ ++#define AMDGPU_VA_HOLE_MASK 0x0000ffffffffffffULL ++ + /* max vmids dedicated for process */ + #define AMDGPU_VM_MAX_RESERVED_VMID 1 + +-- +2.7.4 + |