diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2234-drm-ttm-use-an-operation-context-for-ttm_bo_mem_spac.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2234-drm-ttm-use-an-operation-context-for-ttm_bo_mem_spac.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2234-drm-ttm-use-an-operation-context-for-ttm_bo_mem_spac.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2234-drm-ttm-use-an-operation-context-for-ttm_bo_mem_spac.patch new file mode 100644 index 00000000..db6849ed --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2234-drm-ttm-use-an-operation-context-for-ttm_bo_mem_spac.patch @@ -0,0 +1,107 @@ +From 759c0b840c178c4f655dacf5aef9b2c9ad4ea5b5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Wed, 12 Apr 2017 15:33:00 +0200 +Subject: [PATCH 2234/4131] drm/ttm: use an operation context for + ttm_bo_mem_space v2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Instead of specifying interruptible and no_wait_gpu manually. + +v2: rebase + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> +Tested-by: Michel Dänzer <michel.daenzer@amd.com> +Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 ++++++----- + 2 files changed, 9 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 9af0e92..0f9c756 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -654,6 +654,7 @@ void amdgpu_fw_reserve_vram_fini(struct amdgpu_device *adev) + */ + int amdgpu_fw_reserve_vram_init(struct amdgpu_device *adev) + { ++ struct ttm_operation_ctx ctx = { false, false }; + int r = 0; + int i; + u64 vram_size = adev->mc.visible_vram_size; +@@ -690,8 +691,8 @@ int amdgpu_fw_reserve_vram_init(struct amdgpu_device *adev) + } + + ttm_bo_mem_put(&bo->tbo, &bo->tbo.mem); +- r = ttm_bo_mem_space(&bo->tbo, &bo->placement, &bo->tbo.mem, +- false, false); ++ r = ttm_bo_mem_space(&bo->tbo, &bo->placement, ++ &bo->tbo.mem, &ctx); + if (r) + goto error_pin; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +index 7f9317e..5ada329 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +@@ -514,6 +514,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, + bool no_wait_gpu, + struct ttm_mem_reg *new_mem) + { ++ struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu }; + struct amdgpu_device *adev; + struct ttm_mem_reg *old_mem = &bo->mem; + struct ttm_mem_reg tmp_mem; +@@ -531,8 +532,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, + placements.fpfn = 0; + placements.lpfn = 0; + placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; +- r = ttm_bo_mem_space(bo, &placement, &tmp_mem, +- interruptible, no_wait_gpu); ++ r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx); + if (unlikely(r)) { + return r; + } +@@ -561,6 +561,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, + bool no_wait_gpu, + struct ttm_mem_reg *new_mem) + { ++ struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu }; + struct amdgpu_device *adev; + struct ttm_mem_reg *old_mem = &bo->mem; + struct ttm_mem_reg tmp_mem; +@@ -578,8 +579,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, + placements.fpfn = 0; + placements.lpfn = 0; + placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; +- r = ttm_bo_mem_space(bo, &placement, &tmp_mem, +- interruptible, no_wait_gpu); ++ r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx); + if (unlikely(r)) { + return r; + } +@@ -944,6 +944,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, + int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) + { + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); ++ struct ttm_operation_ctx ctx = { false, false }; + struct amdgpu_ttm_tt *gtt = (void*)bo->ttm; + struct ttm_mem_reg tmp; + +@@ -967,7 +968,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) + placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM) | + TTM_PL_FLAG_TT; + +- r = ttm_bo_mem_space(bo, &placement, &tmp, false, false); ++ r = ttm_bo_mem_space(bo, &placement, &tmp, &ctx); + if (unlikely(r)) + return r; + +-- +2.7.4 + |