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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2205-drm-amdgpu-cleanup-GMC-gart-garbage-function.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2205-drm-amdgpu-cleanup-GMC-gart-garbage-function.patch347
1 files changed, 347 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2205-drm-amdgpu-cleanup-GMC-gart-garbage-function.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2205-drm-amdgpu-cleanup-GMC-gart-garbage-function.patch
new file mode 100644
index 00000000..145a9aaf
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2205-drm-amdgpu-cleanup-GMC-gart-garbage-function.patch
@@ -0,0 +1,347 @@
+From 344b4764c8c1014888556a38a8bb92d66fec2649 Mon Sep 17 00:00:00 2001
+From: Monk Liu <Monk.Liu@amd.com>
+Date: Tue, 14 Nov 2017 11:52:35 +0800
+Subject: [PATCH 2205/4131] drm/amdgpu:cleanup GMC & gart garbage function
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+for gart_ram_alloc/free, they are never used in driver thus
+ripe them out totally.
+
+for gart_vram_pin/unpin, they are not needed becuase we can
+use bo_creat_kernel/free to replace the original manual way
+in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
+also be riped out.
+
+Change-Id: Ic60949b59d8b363e5199f6c11d9ea4a15ec57519
+Signed-off-by: Monk Liu <Monk.Liu@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 136 ++-----------------------------
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 4 -
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 -
+ drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 7 +-
+ drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 7 +-
+ drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 7 +-
+ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 +-
+ 7 files changed, 13 insertions(+), 156 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+index fe81850..10eeb30 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+@@ -57,63 +57,6 @@
+ */
+
+ /**
+- * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
+- *
+- * @adev: amdgpu_device pointer
+- *
+- * Allocate system memory for GART page table
+- * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
+- * gart table to be in system memory.
+- * Returns 0 for success, -ENOMEM for failure.
+- */
+-int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev)
+-{
+- void *ptr;
+-
+- ptr = pci_alloc_consistent(adev->pdev, adev->gart.table_size,
+- &adev->gart.table_addr);
+- if (ptr == NULL) {
+- return -ENOMEM;
+- }
+-#ifdef CONFIG_X86
+- if (0) {
+- set_memory_uc((unsigned long)ptr,
+- adev->gart.table_size >> PAGE_SHIFT);
+- }
+-#endif
+- adev->gart.ptr = ptr;
+- memset((void *)adev->gart.ptr, 0, adev->gart.table_size);
+- return 0;
+-}
+-
+-/**
+- * amdgpu_gart_table_ram_free - free system ram for gart page table
+- *
+- * @adev: amdgpu_device pointer
+- *
+- * Free system memory for GART page table
+- * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
+- * gart table to be in system memory.
+- */
+-void amdgpu_gart_table_ram_free(struct amdgpu_device *adev)
+-{
+- if (adev->gart.ptr == NULL) {
+- return;
+- }
+-#ifdef CONFIG_X86
+- if (0) {
+- set_memory_wb((unsigned long)adev->gart.ptr,
+- adev->gart.table_size >> PAGE_SHIFT);
+- }
+-#endif
+- pci_free_consistent(adev->pdev, adev->gart.table_size,
+- (void *)adev->gart.ptr,
+- adev->gart.table_addr);
+- adev->gart.ptr = NULL;
+- adev->gart.table_addr = 0;
+-}
+-
+-/**
+ * amdgpu_gart_table_vram_alloc - allocate vram for gart page table
+ *
+ * @adev: amdgpu_device pointer
+@@ -125,75 +68,9 @@ void amdgpu_gart_table_ram_free(struct amdgpu_device *adev)
+ */
+ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
+ {
+- int r;
+-
+- if (adev->gart.robj == NULL) {
+- r = amdgpu_bo_create(adev, adev->gart.table_size,
+- PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
+- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
+- NULL, NULL, 0, &adev->gart.robj);
+- if (r) {
+- return r;
+- }
+- }
+- return 0;
+-}
+-
+-/**
+- * amdgpu_gart_table_vram_pin - pin gart page table in vram
+- *
+- * @adev: amdgpu_device pointer
+- *
+- * Pin the GART page table in vram so it will not be moved
+- * by the memory manager (pcie r4xx, r5xx+). These asics require the
+- * gart table to be in video memory.
+- * Returns 0 for success, error for failure.
+- */
+-int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev)
+-{
+- uint64_t gpu_addr;
+- int r;
+-
+- r = amdgpu_bo_reserve(adev->gart.robj, false);
+- if (unlikely(r != 0))
+- return r;
+- r = amdgpu_bo_pin(adev->gart.robj,
+- AMDGPU_GEM_DOMAIN_VRAM, &gpu_addr);
+- if (r) {
+- amdgpu_bo_unreserve(adev->gart.robj);
+- return r;
+- }
+- r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr);
+- if (r)
+- amdgpu_bo_unpin(adev->gart.robj);
+- amdgpu_bo_unreserve(adev->gart.robj);
+- adev->gart.table_addr = gpu_addr;
+- return r;
+-}
+-
+-/**
+- * amdgpu_gart_table_vram_unpin - unpin gart page table in vram
+- *
+- * @adev: amdgpu_device pointer
+- *
+- * Unpin the GART page table in vram (pcie r4xx, r5xx+).
+- * These asics require the gart table to be in video memory.
+- */
+-void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
+-{
+- int r;
+-
+- if (adev->gart.robj == NULL) {
+- return;
+- }
+- r = amdgpu_bo_reserve(adev->gart.robj, true);
+- if (likely(r == 0)) {
+- amdgpu_bo_kunmap(adev->gart.robj);
+- amdgpu_bo_unpin(adev->gart.robj);
+- amdgpu_bo_unreserve(adev->gart.robj);
+- adev->gart.ptr = NULL;
+- }
++ return amdgpu_bo_create_kernel(adev, adev->gart.table_size, PAGE_SIZE,
++ AMDGPU_GEM_DOMAIN_VRAM, &adev->gart.robj,
++ &adev->gart.table_addr, &adev->gart.ptr);
+ }
+
+ /**
+@@ -207,10 +84,9 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
+ */
+ void amdgpu_gart_table_vram_free(struct amdgpu_device *adev)
+ {
+- if (adev->gart.robj == NULL) {
+- return;
+- }
+- amdgpu_bo_unref(&adev->gart.robj);
++ amdgpu_bo_free_kernel(&adev->gart.robj,
++ &adev->gart.table_addr,
++ &adev->gart.ptr);
+ }
+
+ /*
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
+index afbe803..f15e319 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
+@@ -56,12 +56,8 @@ struct amdgpu_gart {
+ const struct amdgpu_gart_funcs *gart_funcs;
+ };
+
+-int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
+-void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
+ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
+ void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
+-int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
+-void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
+ int amdgpu_gart_init(struct amdgpu_device *adev);
+ void amdgpu_gart_fini(struct amdgpu_device *adev);
+ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+index dc1bad5..b905a25 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+@@ -1634,8 +1634,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
+
+ void amdgpu_ttm_fini(struct amdgpu_device *adev)
+ {
+- int r;
+-
+ if (!adev->mman.initialized)
+ return;
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+index c9f144d..1e6e50a 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+@@ -477,16 +477,14 @@ static void gmc_v6_0_set_prt(struct amdgpu_device *adev, bool enable)
+
+ static int gmc_v6_0_gart_enable(struct amdgpu_device *adev)
+ {
+- int r, i;
++ int i;
+ u32 field;
+
+ if (adev->gart.robj == NULL) {
+ dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
+ return -EINVAL;
+ }
+- r = amdgpu_gart_table_vram_pin(adev);
+- if (r)
+- return r;
++
+ /* Setup TLB control */
+ WREG32(mmMC_VM_MX_L1_TLB_CNTL,
+ (0xA << 7) |
+@@ -613,7 +611,6 @@ static void gmc_v6_0_gart_disable(struct amdgpu_device *adev)
+ WREG32(mmVM_L2_CNTL3,
+ VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY_MASK |
+ (0UL << VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT));
+- amdgpu_gart_table_vram_unpin(adev);
+ }
+
+ static void gmc_v6_0_gart_fini(struct amdgpu_device *adev)
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+index cf23c70..2e0cc17 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+@@ -582,16 +582,14 @@ static void gmc_v7_0_set_prt(struct amdgpu_device *adev, bool enable)
+ */
+ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
+ {
+- int r, i;
++ int i;
+ u32 tmp, field;
+
+ if (adev->gart.robj == NULL) {
+ dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
+ return -EINVAL;
+ }
+- r = amdgpu_gart_table_vram_pin(adev);
+- if (r)
+- return r;
++
+ /* Setup TLB control */
+ tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);
+ tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);
+@@ -724,7 +722,6 @@ static void gmc_v7_0_gart_disable(struct amdgpu_device *adev)
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
+ WREG32(mmVM_L2_CNTL, tmp);
+ WREG32(mmVM_L2_CNTL2, 0);
+- amdgpu_gart_table_vram_unpin(adev);
+ }
+
+ /**
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+index 868dff2..4529af5 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+@@ -785,16 +785,14 @@ static void gmc_v8_0_set_prt(struct amdgpu_device *adev, bool enable)
+ */
+ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev)
+ {
+- int r, i;
++ int i;
+ u32 tmp, field;
+
+ if (adev->gart.robj == NULL) {
+ dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
+ return -EINVAL;
+ }
+- r = amdgpu_gart_table_vram_pin(adev);
+- if (r)
+- return r;
++
+ /* Setup TLB control */
+ tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);
+ tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);
+@@ -944,7 +942,6 @@ static void gmc_v8_0_gart_disable(struct amdgpu_device *adev)
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
+ WREG32(mmVM_L2_CNTL, tmp);
+ WREG32(mmVM_L2_CNTL2, 0);
+- amdgpu_gart_table_vram_unpin(adev);
+ }
+
+ /**
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+index 4b5adf7..205195c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+@@ -866,7 +866,7 @@ static int gmc_v9_0_sw_init(void *handle)
+ }
+
+ /**
+- * gmc_v8_0_gart_fini - vm fini callback
++ * gmc_v9_0_gart_fini - vm fini callback
+ *
+ * @adev: amdgpu_device pointer
+ *
+@@ -930,9 +930,6 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
+ dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
+ return -EINVAL;
+ }
+- r = amdgpu_gart_table_vram_pin(adev);
+- if (r)
+- return r;
+
+ switch (adev->asic_type) {
+ case CHIP_RAVEN:
+@@ -1010,7 +1007,6 @@ static void gmc_v9_0_gart_disable(struct amdgpu_device *adev)
+ {
+ gfxhub_v1_0_gart_disable(adev);
+ mmhub_v1_0_gart_disable(adev);
+- amdgpu_gart_table_vram_unpin(adev);
+ }
+
+ static int gmc_v9_0_hw_fini(void *handle)
+--
+2.7.4
+
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