diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2150-drm-amdgpu-use-irq-safe-lock-for-kiq-ring_lock.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2150-drm-amdgpu-use-irq-safe-lock-for-kiq-ring_lock.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2150-drm-amdgpu-use-irq-safe-lock-for-kiq-ring_lock.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2150-drm-amdgpu-use-irq-safe-lock-for-kiq-ring_lock.patch new file mode 100644 index 00000000..42f9572d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2150-drm-amdgpu-use-irq-safe-lock-for-kiq-ring_lock.patch @@ -0,0 +1,69 @@ +From ab220138f6dc87687526c75b5c32d0989810a87a Mon Sep 17 00:00:00 2001 +From: pding <Pixel.Ding@amd.com> +Date: Tue, 7 Nov 2017 14:32:36 +0800 +Subject: [PATCH 2150/4131] drm/amdgpu: use irq-safe lock for kiq->ring_lock +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This lock is used during register accessing in SRIOV guest. +The register accessing could happen both in irq enabled and +irq disabled cases. Always use irq-safe lock. + +Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +index 9a73918..733c64c 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +@@ -120,18 +120,19 @@ void amdgpu_virt_init_setting(struct amdgpu_device *adev) + uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg) + { + signed long r; ++ unsigned long flags; + uint32_t val, seq; + struct amdgpu_kiq *kiq = &adev->gfx.kiq; + struct amdgpu_ring *ring = &kiq->ring; + + BUG_ON(!ring->funcs->emit_rreg); + +- spin_lock(&kiq->ring_lock); ++ spin_lock_irqsave(&kiq->ring_lock, flags); + amdgpu_ring_alloc(ring, 32); + amdgpu_ring_emit_rreg(ring, reg); + amdgpu_fence_emit_polling(ring, &seq); + amdgpu_ring_commit(ring); +- spin_unlock(&kiq->ring_lock); ++ spin_unlock_irqrestore(&kiq->ring_lock, flags); + + r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); + if (r < 1) { +@@ -146,18 +147,19 @@ uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg) + void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) + { + signed long r; ++ unsigned long flags; + uint32_t seq; + struct amdgpu_kiq *kiq = &adev->gfx.kiq; + struct amdgpu_ring *ring = &kiq->ring; + + BUG_ON(!ring->funcs->emit_wreg); + +- spin_lock(&kiq->ring_lock); ++ spin_lock_irqsave(&kiq->ring_lock, flags); + amdgpu_ring_alloc(ring, 32); + amdgpu_ring_emit_wreg(ring, reg, v); + amdgpu_fence_emit_polling(ring, &seq); + amdgpu_ring_commit(ring); +- spin_unlock(&kiq->ring_lock); ++ spin_unlock_irqrestore(&kiq->ring_lock, flags); + + r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); + if (r < 1) +-- +2.7.4 + |