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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2129-drm-amdkfd-Get-SDMA-engine-number-from-amdgpu-and-re.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2129-drm-amdkfd-Get-SDMA-engine-number-from-amdgpu-and-re.patch264
1 files changed, 264 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2129-drm-amdkfd-Get-SDMA-engine-number-from-amdgpu-and-re.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2129-drm-amdkfd-Get-SDMA-engine-number-from-amdgpu-and-re.patch
new file mode 100644
index 00000000..36f62e67
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2129-drm-amdkfd-Get-SDMA-engine-number-from-amdgpu-and-re.patch
@@ -0,0 +1,264 @@
+From b8385b2a3740655a4905d2786b6003bd0cef480e Mon Sep 17 00:00:00 2001
+From: Yong Zhao <yong.zhao@amd.com>
+Date: Tue, 17 Oct 2017 18:02:57 -0400
+Subject: [PATCH 2129/4131] drm/amdkfd: Get SDMA engine number from amdgpu and
+ replace hard coded value
+
+On Raven there is only one SDMA engine instead of previously assumed two,
+so we need to adapt our code to this new scenario.
+
+Change-Id: I6bfcfa73b4931fbbe7c491b14447b87311fe87eb
+Signed-off-by: Yong Zhao <yong.zhao@amd.com>
+---
+ drivers/gpu/drm/amd/amdkfd/kfd_device.c | 13 ++++++++++
+ .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 29 +++++++++++++++-------
+ .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 6 ++---
+ drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 2 ++
+ .../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 3 ++-
+ 5 files changed, 39 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+index 30ea84b..4443b20 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+@@ -48,6 +48,7 @@ static const struct kfd_device_info kaveri_device_info = {
+ .is_need_iommu_device = true,
+ .supports_cwsr = false,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+ #endif
+
+@@ -64,6 +65,7 @@ static const struct kfd_device_info hawaii_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = false,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+
+ #if defined(CONFIG_AMD_IOMMU_V2_MODULE) || defined(CONFIG_AMD_IOMMU_V2)
+@@ -80,6 +82,7 @@ static const struct kfd_device_info carrizo_device_info = {
+ .is_need_iommu_device = true,
+ .supports_cwsr = true,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+ #endif
+
+@@ -95,6 +98,7 @@ static const struct kfd_device_info tonga_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = false,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info tonga_vf_device_info = {
+@@ -109,6 +113,7 @@ static const struct kfd_device_info tonga_vf_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = false,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info fiji_device_info = {
+@@ -123,6 +128,7 @@ static const struct kfd_device_info fiji_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info fiji_vf_device_info = {
+@@ -137,6 +143,7 @@ static const struct kfd_device_info fiji_vf_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+
+
+@@ -152,6 +159,7 @@ static const struct kfd_device_info polaris10_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info polaris10_vf_device_info = {
+@@ -166,6 +174,7 @@ static const struct kfd_device_info polaris10_vf_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info polaris11_device_info = {
+@@ -180,6 +189,7 @@ static const struct kfd_device_info polaris11_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info vega10_device_info = {
+@@ -194,6 +204,7 @@ static const struct kfd_device_info vega10_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info vega10_vf_device_info = {
+@@ -208,6 +219,7 @@ static const struct kfd_device_info vega10_vf_device_info = {
+ .is_need_iommu_device = false,
+ .supports_cwsr = true,
+ .needs_pci_atomics = false,
++ .num_sdma_engines = 2,
+ };
+
+ static const struct kfd_device_info raven_device_info = {
+@@ -222,6 +234,7 @@ static const struct kfd_device_info raven_device_info = {
+ .is_need_iommu_device = true,
+ .supports_cwsr = true,
+ .needs_pci_atomics = true,
++ .num_sdma_engines = 1,
+ };
+
+ struct kfd_deviceid {
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+index cd0990e..0c15793d 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+@@ -97,6 +97,17 @@ unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
+ return dqm->dev->shared_resources.num_pipe_per_mec;
+ }
+
++static unsigned int get_num_sdma_engines(struct device_queue_manager *dqm)
++{
++ return dqm->dev->device_info->num_sdma_engines;
++}
++
++unsigned int get_num_sdma_queues(struct device_queue_manager *dqm)
++{
++ return dqm->dev->device_info->num_sdma_engines
++ * KFD_SDMA_QUEUES_PER_ENGINE;
++}
++
+ void program_sh_mem_settings(struct device_queue_manager *dqm,
+ struct qcm_process_device *qpd)
+ {
+@@ -794,7 +805,7 @@ static int initialize_nocpsch(struct device_queue_manager *dqm)
+ dqm->allocated_queues[i] = (1 << get_queues_per_pipe(dqm)) - 1;
+
+ dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
+- dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
++ dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1;
+
+ init_scheduler(dqm);
+ return 0;
+@@ -843,7 +854,7 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm,
+ static void deallocate_sdma_queue(struct device_queue_manager *dqm,
+ unsigned int sdma_queue_id)
+ {
+- if (sdma_queue_id >= CIK_SDMA_QUEUES)
++ if (sdma_queue_id >= get_num_sdma_queues(dqm))
+ return;
+ dqm->sdma_bitmap |= (1 << sdma_queue_id);
+ }
+@@ -863,8 +874,8 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
+ if (retval)
+ return retval;
+
+- q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_ENGINE_NUM;
+- q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_ENGINE_NUM;
++ q->properties.sdma_queue_id = q->sdma_id / get_num_sdma_engines(dqm);
++ q->properties.sdma_engine_id = q->sdma_id % get_num_sdma_engines(dqm);
+
+ retval = allocate_doorbell(qpd, q);
+ if (retval)
+@@ -952,7 +963,7 @@ static int initialize_cpsch(struct device_queue_manager *dqm)
+ dqm->queue_count = dqm->processes_count = 0;
+ dqm->sdma_queue_count = 0;
+ dqm->active_runlist = false;
+- dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
++ dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1;
+ retval = dqm->asic_ops.init_cpsch(dqm);
+ if (retval)
+ mutex_destroy(&dqm->lock);
+@@ -1088,9 +1099,9 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
+ if (retval)
+ goto out_unlock;
+ q->properties.sdma_queue_id =
+- q->sdma_id / CIK_SDMA_ENGINE_NUM;
++ q->sdma_id / get_num_sdma_engines(dqm);
+ q->properties.sdma_engine_id =
+- q->sdma_id % CIK_SDMA_ENGINE_NUM;
++ q->sdma_id % get_num_sdma_engines(dqm);
+ }
+
+ retval = allocate_doorbell(qpd, q);
+@@ -1734,8 +1745,8 @@ int device_queue_manager_debugfs_hqds(struct seq_file *m, void *data)
+ }
+ }
+
+- for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) {
+- for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) {
++ for (pipe = 0; pipe < get_num_sdma_engines(dqm); pipe++) {
++ for (queue = 0; queue < KFD_SDMA_QUEUES_PER_ENGINE; queue++) {
+ r = dqm->dev->kfd2kgd->hqd_sdma_dump(
+ dqm->dev->kgd, pipe, queue, &dump, &n_regs);
+ if (r)
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+index ac9a24f..d9c9cbc8 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+@@ -34,10 +34,7 @@
+ #define QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS (2 * KFD_UNMAP_LATENCY_MS + 1000)
+
+ #define KFD_DQM_FIRST_PIPE (0)
+-#define CIK_SDMA_QUEUES_PER_ENGINE (2)
+-#define CIK_SDMA_ENGINE_NUM (2)
+-#define CIK_SDMA_QUEUES (CIK_SDMA_QUEUES_PER_ENGINE \
+- * CIK_SDMA_ENGINE_NUM)
++#define KFD_SDMA_QUEUES_PER_ENGINE (2)
+
+ struct device_process_node {
+ struct qcm_process_device *qpd;
+@@ -215,6 +212,7 @@ void program_sh_mem_settings(struct device_queue_manager *dqm,
+ unsigned int get_queues_num(struct device_queue_manager *dqm);
+ unsigned int get_queues_per_pipe(struct device_queue_manager *dqm);
+ unsigned int get_pipes_per_mec(struct device_queue_manager *dqm);
++unsigned int get_num_sdma_queues(struct device_queue_manager *dqm);
+
+ int process_evict_queues(struct device_queue_manager *dqm,
+ struct qcm_process_device *qpd);
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+index aa07780..63ca8ca 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+@@ -201,6 +201,8 @@ struct kfd_device_info {
+ bool is_need_iommu_device;
+ bool supports_cwsr;
+ bool needs_pci_atomics;
++ /* obtain from adev->sdma.num_instances */
++ unsigned int num_sdma_engines;
+ };
+
+ struct kfd_mem_obj {
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+index fb7d711..5b874c3 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+@@ -187,7 +187,8 @@ int pqm_create_queue(struct process_queue_manager *pqm,
+
+ switch (type) {
+ case KFD_QUEUE_TYPE_SDMA:
+- if (dev->dqm->sdma_queue_count >= CIK_SDMA_QUEUES) {
++ if (dev->dqm->sdma_queue_count
++ >= get_num_sdma_queues(dev->dqm)) {
+ pr_debug("Over-subscription is not allowed for SDMA\n");
+ retval = -EPERM;
+ goto err_create_queue;
+--
+2.7.4
+