1 files changed, 99 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1979-drm-amdgpu-add-plumbing-for-ctx-priority-changes-v2.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1979-drm-amdgpu-add-plumbing-for-ctx-priority-changes-v2.patch
new file mode 100644
index 00000000..6df91a5c
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1979-drm-amdgpu-add-plumbing-for-ctx-priority-changes-v2.patch
@@ -0,0 +1,99 @@
+From 2df6949a4453bd4617d783d9ec5594c62bffd3b4 Mon Sep 17 00:00:00 2001
+From: Andres Rodriguez <andresx7@gmail.com>
+Date: Tue, 6 Jun 2017 20:20:38 -0400
+Subject: [PATCH 1979/4131] drm/amdgpu: add plumbing for ctx priority changes
+ v2
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Introduce amdgpu_ctx_priority_override(). A mechanism to override a
+context's priority.
+
+An override can be terminated by setting the override to
+AMD_SCHED_PRIORITY_UNSET.
+
+v2: change refcounted interface for a direct set
+
+Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
+Acked-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  6 +++++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 29 +++++++++++++++++++++++++++++
+ 2 files changed, 34 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+index e5cabee..606cf9e 100755
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -759,7 +759,9 @@ struct amdgpu_ctx {
+ 	spinlock_t		ring_lock;
+ 	struct dma_fence	**fences;
+ 	struct amdgpu_ctx_ring	rings[AMDGPU_MAX_RINGS];
+-	bool preamble_presented;
++	bool 			preamble_presented;
++	enum amd_sched_priority init_priority;
++	enum amd_sched_priority override_priority;
+ };
+ 
+ struct amdgpu_ctx_mgr {
+@@ -776,6 +778,8 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
+ 			      struct dma_fence *fence, uint64_t *seq);
+ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
+ 				   struct amdgpu_ring *ring, uint64_t seq);
++void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
++				  enum amd_sched_priority priority);
+ 
+ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
+ 		     struct drm_file *filp);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+index 1a77961..1de7119 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+@@ -74,6 +74,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
+ 	}
+ 
+ 	ctx->reset_counter = atomic_read(&adev->gpu_reset_counter);
++	ctx->init_priority = priority;
++	ctx->override_priority = AMD_SCHED_PRIORITY_UNSET;
+ 
+ 	/* create context entity for each ring */
+ 	for (i = 0; i < adev->num_rings; i++) {
+@@ -379,6 +381,33 @@ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
+ 	return fence;
+ }
+ 
++void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
++				  enum amd_sched_priority priority)
++{
++	int i;
++	struct amdgpu_device *adev = ctx->adev;
++	struct amd_sched_rq *rq;
++	struct amd_sched_entity *entity;
++	struct amdgpu_ring *ring;
++	enum amd_sched_priority ctx_prio;
++
++	ctx->override_priority = priority;
++
++	ctx_prio = (ctx->override_priority == AMD_SCHED_PRIORITY_UNSET) ?
++			ctx->init_priority : ctx->override_priority;
++
++	for (i = 0; i < adev->num_rings; i++) {
++		ring = adev->rings[i];
++		entity = &ctx->rings[i].entity;
++		rq = &ring->sched.sched_rq[ctx_prio];
++
++		if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
++			continue;
++
++		amd_sched_entity_set_rq(entity, rq);
++	}
++}
++
+ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
+ {
+ 	mutex_init(&mgr->lock);
+-- 
+2.7.4
+