diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1952-drm-amdgpu-add-uvd-enc-ring-test.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1952-drm-amdgpu-add-uvd-enc-ring-test.patch | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1952-drm-amdgpu-add-uvd-enc-ring-test.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1952-drm-amdgpu-add-uvd-enc-ring-test.patch new file mode 100644 index 00000000..aaf27dfa --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1952-drm-amdgpu-add-uvd-enc-ring-test.patch @@ -0,0 +1,108 @@ +From b8fa98eeec3868c0e3cf5d15fa25be9e3a0288bb Mon Sep 17 00:00:00 2001 +From: James Zhu <James.Zhu@amd.com> +Date: Fri, 29 Sep 2017 16:40:12 -0400 +Subject: [PATCH 1952/4131] drm/amdgpu: add uvd enc ring test +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add UVD encode ring test functions. And enable UVD encode ring test +during UVD encode hardware initialization. + +Signed-off-by: James Zhu <James.Zhu@amd.com> +Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 55 ++++++++++++++++++++++++++++++++++- + 1 file changed, 54 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +index 8b50441..996e671 100644 +--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +@@ -155,6 +155,46 @@ static void uvd_v6_0_enc_ring_set_wptr(struct amdgpu_ring *ring) + lower_32_bits(ring->wptr)); + } + ++/** ++ * uvd_v6_0_enc_ring_test_ring - test if UVD ENC ring is working ++ * ++ * @ring: the engine to test on ++ * ++ */ ++static int uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring) ++{ ++ struct amdgpu_device *adev = ring->adev; ++ uint32_t rptr = amdgpu_ring_get_rptr(ring); ++ unsigned i; ++ int r; ++ ++ r = amdgpu_ring_alloc(ring, 16); ++ if (r) { ++ DRM_ERROR("amdgpu: uvd enc failed to lock ring %d (%d).\n", ++ ring->idx, r); ++ return r; ++ } ++ amdgpu_ring_write(ring, HEVC_ENC_CMD_END); ++ amdgpu_ring_commit(ring); ++ ++ for (i = 0; i < adev->usec_timeout; i++) { ++ if (amdgpu_ring_get_rptr(ring) != rptr) ++ break; ++ DRM_UDELAY(1); ++ } ++ ++ if (i < adev->usec_timeout) { ++ DRM_INFO("ring test on %d succeeded in %d usecs\n", ++ ring->idx, i); ++ } else { ++ DRM_ERROR("amdgpu: ring %d test failed\n", ++ ring->idx); ++ r = -ETIMEDOUT; ++ } ++ ++ return r; ++} ++ + static int uvd_v6_0_early_init(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; +@@ -256,7 +296,7 @@ static int uvd_v6_0_hw_init(void *handle) + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + struct amdgpu_ring *ring = &adev->uvd.ring; + uint32_t tmp; +- int r; ++ int i, r; + + amdgpu_asic_set_uvd_clocks(adev, 10000, 10000); + uvd_v6_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE); +@@ -296,6 +336,18 @@ static int uvd_v6_0_hw_init(void *handle) + + amdgpu_ring_commit(ring); + ++ if (uvd_v6_0_enc_support(adev)) { ++ for (i = 0; i < adev->uvd.num_enc_rings; ++i) { ++ ring = &adev->uvd.ring_enc[i]; ++ ring->ready = true; ++ r = amdgpu_ring_test_ring(ring); ++ if (r) { ++ ring->ready = false; ++ goto done; ++ } ++ } ++ } ++ + done: + if (!r) + if (uvd_v6_0_enc_support(adev)) +@@ -1356,6 +1408,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_enc_ring_vm_funcs = { + .emit_fence = uvd_v6_0_enc_ring_emit_fence, + .emit_vm_flush = uvd_v6_0_enc_ring_emit_vm_flush, + .emit_pipeline_sync = uvd_v6_0_enc_ring_emit_pipeline_sync, ++ .test_ring = uvd_v6_0_enc_ring_test_ring, + .insert_nop = amdgpu_ring_insert_nop, + .insert_end = uvd_v6_0_enc_ring_insert_end, + .pad_ib = amdgpu_ring_generic_pad_ib, +-- +2.7.4 + |