aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch
new file mode 100644
index 00000000..b8c0c45f
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1912-drm-amdgpu-gfx9-implement-wave-VGPR-reading.patch
@@ -0,0 +1,47 @@
+From 80498a09e8769ec96a08bf424b9a3c5bd21a6a54 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= <nicolai.haehnle@amd.com>
+Date: Sat, 9 Sep 2017 00:09:29 +0200
+Subject: [PATCH 1912/4131] drm/amdgpu/gfx9: implement wave VGPR reading
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This is already hooked up to the "amdgpu_gpr" debugfs file used by
+the umr userspace debugging tool.
+
+Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
+Acked-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index 2f869c3..7014128 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -987,12 +987,22 @@ static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
+ start + SQIND_WAVE_SGPRS_OFFSET, size, dst);
+ }
+
++static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd,
++ uint32_t wave, uint32_t thread,
++ uint32_t start, uint32_t size,
++ uint32_t *dst)
++{
++ wave_read_regs(
++ adev, simd, wave, thread,
++ start + SQIND_WAVE_VGPRS_OFFSET, size, dst);
++}
+
+ static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = {
+ .get_gpu_clock_counter = &gfx_v9_0_get_gpu_clock_counter,
+ .select_se_sh = &gfx_v9_0_select_se_sh,
+ .read_wave_data = &gfx_v9_0_read_wave_data,
+ .read_wave_sgprs = &gfx_v9_0_read_wave_sgprs,
++ .read_wave_vgprs = &gfx_v9_0_read_wave_vgprs,
+ };
+
+ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
+--
+2.7.4
+