diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1889-drm-amd-powerplay-delete-SMUM_READ_FIELD.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1889-drm-amd-powerplay-delete-SMUM_READ_FIELD.patch | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1889-drm-amd-powerplay-delete-SMUM_READ_FIELD.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1889-drm-amd-powerplay-delete-SMUM_READ_FIELD.patch new file mode 100644 index 00000000..3c5fc45b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1889-drm-amd-powerplay-delete-SMUM_READ_FIELD.patch @@ -0,0 +1,90 @@ +From 3f9e548cba1930db6abc11d71780c4ad333c9665 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 20 Sep 2017 17:26:03 +0800 +Subject: [PATCH 1889/4131] drm/amd/powerplay: delete SMUM_READ_FIELD + +repeated defining in hwmgr.h + +Change-Id: I91c50a3516866466841c8624eeacf18c3de5147d +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 2 -- + drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c | 2 +- + drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c | 2 +- + drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 6 +++--- + 4 files changed, 5 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h +index b742c22..ebe988b 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h +@@ -167,8 +167,6 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); + (((value) & SMUM_FIELD_MASK(reg, field)) \ + >> SMUM_FIELD_SHIFT(reg, field)) + +-#define SMUM_READ_FIELD(device, reg, field) \ +- SMUM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field) + + #define SMUM_READ_INDIRECT_FIELD(device, port, reg, field) \ + SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c +index e39ecaa..b922de5 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c +@@ -219,7 +219,7 @@ int ci_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) + + PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); + +- ret = SMUM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); ++ ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); + + if (ret != 1) + pr_info("\n failed to send message %x ret is %d\n", msg, ret); +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c +index d0913a6..c92ea38 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c +@@ -866,7 +866,7 @@ static int polaris10_populate_single_memory_level(struct pp_hwmgr *hwmgr, + + if (mclk_stutter_mode_threshold && + (clock <= mclk_stutter_mode_threshold) && +- (SMUM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, ++ (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, + STUTTER_ENABLE) & 0x1)) + mem_level->StutterEnable = true; + +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +index 89e2464..2ae05bb 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +@@ -172,7 +172,7 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) + + PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); + +- ret = SMUM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); ++ ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); + + if (ret != 1) + pr_info("\n failed to send pre message %x ret is %d \n", msg, ret); +@@ -181,7 +181,7 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) + + PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); + +- ret = SMUM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); ++ ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); + + if (ret != 1) + pr_info("\n failed to send message %x ret is %d \n", msg, ret); +@@ -224,7 +224,7 @@ int smu7_send_msg_to_smc_offset(struct pp_hwmgr *hwmgr) + + PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); + +- if (1 != SMUM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP)) ++ if (1 != PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP)) + pr_info("Failed to send Message.\n"); + + return 0; +-- +2.7.4 + |