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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1882-drm-amd-powerplay-move-PHM_WAIT_VFPF_INDIRECT_FIELD-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1882-drm-amd-powerplay-move-PHM_WAIT_VFPF_INDIRECT_FIELD-.patch186
1 files changed, 186 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1882-drm-amd-powerplay-move-PHM_WAIT_VFPF_INDIRECT_FIELD-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1882-drm-amd-powerplay-move-PHM_WAIT_VFPF_INDIRECT_FIELD-.patch
new file mode 100644
index 00000000..78b7f011
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1882-drm-amd-powerplay-move-PHM_WAIT_VFPF_INDIRECT_FIELD-.patch
@@ -0,0 +1,186 @@
+From 54f837260f55c5c41e4ce0d3d2eb819e5f3c5083 Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Wed, 20 Sep 2017 17:04:33 +0800
+Subject: [PATCH 1882/4131] drm/amd/powerplay: move
+ PHM_WAIT_VFPF_INDIRECT_FIELD to hwmgr.h
+
+the macro is not relevant to SMU, so move to hwmgr.h
+and rename to PHM_WAIT_VFPF_INDIRECT_FIELD
+
+Change-Id: Ib8621a4ff757eee5c67fb3638700a4169e70be30
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 14 ++++++++++++++
+ drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 14 +-------------
+ drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +++---
+ drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 6 +++---
+ drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 2 +-
+ drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 6 +++---
+ 6 files changed, 25 insertions(+), 23 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+index 85a2df2..2ac8d7b 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+@@ -915,4 +915,18 @@ extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_t
+ (fieldval) << PHM_FIELD_SHIFT(reg, field), \
+ PHM_FIELD_MASK(reg, field))
+
++
++#define PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, \
++ port, index, value, mask) \
++ phm_wait_on_indirect_register(hwmgr, \
++ mm##port##_INDEX_11, index, value, mask)
++
++#define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
++ PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
++
++#define PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
++ PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, \
++ (fieldval) << PHM_FIELD_SHIFT(reg, field), \
++ PHM_FIELD_MASK(reg, field))
++
+ #endif /* _HWMGR_H_ */
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+index 125fa3e..099758d 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+@@ -193,16 +193,7 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
+ SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
+ reg, field)
+
+-#define SMUM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, \
+- port, index, value, mask) \
+- smum_wait_on_indirect_register(hwmgr, \
+- mm##port##_INDEX_11, index, value, mask)
+-
+-
+-
+
+-#define SMUM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
+- SMUM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
+
+
+
+@@ -229,10 +220,7 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
+ reg, field, fieldval))
+
+
+-#define SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
+- SMUM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, \
+- (fieldval) << SMUM_FIELD_SHIFT(reg, field), \
+- SMUM_FIELD_MASK(reg, field))
++
+
+
+ #endif
+diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+index 762fe16..75ed7c3 100644
+--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
++++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+@@ -96,7 +96,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr)
+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
+ ixFIRMWARE_FLAGS, 0);
+
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
+ INTERRUPTS_ENABLED, 1);
+
+ cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);
+@@ -115,7 +115,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr)
+ }
+
+ /* Wait for firmware to initialize */
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return result;
+@@ -153,7 +153,7 @@ static int fiji_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr)
+ SMC_SYSCON_RESET_CNTL, rst_reg, 0);
+
+ /* Wait for firmware to initialize */
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return result;
+diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+index 3cc946d..fd4ccd0 100644
+--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
++++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+@@ -241,7 +241,7 @@ static int polaris10_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr)
+ SMC_SYSCON_RESET_CNTL, rst_reg, 0);
+
+
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS, INTERRUPTS_ENABLED, 1);
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS, INTERRUPTS_ENABLED, 1);
+
+
+ /* Call Test SMU message with 0x20000 offset to trigger SMU start */
+@@ -265,7 +265,7 @@ static int polaris10_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr)
+ SMC_SYSCON_RESET_CNTL, rst_reg, 0);
+
+ /* Wait for firmware to initialize */
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return result;
+ }
+@@ -301,7 +301,7 @@ static int polaris10_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr)
+
+ /* Wait for firmware to initialize */
+
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return result;
+diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+index bb26906..a360c3c 100644
+--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
++++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+@@ -235,7 +235,7 @@ int smu7_wait_for_smc_inactive(struct pp_hwmgr *hwmgr)
+ if (!smu7_is_smc_ram_running(hwmgr))
+ return -EINVAL;
+
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, SMC_SYSCON_CLOCK_CNTL_0, cken, 0);
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, SMC_SYSCON_CLOCK_CNTL_0, cken, 0);
+ return 0;
+ }
+
+diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+index a0e0f5e..6a9b3cf 100644
+--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
++++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+@@ -69,7 +69,7 @@ static int tonga_start_in_protection_mode(struct pp_hwmgr *hwmgr)
+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
+ ixFIRMWARE_FLAGS, 0);
+
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ RCU_UC_EVENTS, INTERRUPTS_ENABLED, 1);
+
+ /**
+@@ -89,7 +89,7 @@ static int tonga_start_in_protection_mode(struct pp_hwmgr *hwmgr)
+ }
+
+ /* Wait for firmware to initialize */
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return 0;
+@@ -129,7 +129,7 @@ static int tonga_start_in_non_protection_mode(struct pp_hwmgr *hwmgr)
+ SMC_SYSCON_RESET_CNTL, rst_reg, 0);
+
+ /* Wait for firmware to initialize */
+- SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
++ PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,
+ FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1);
+
+ return result;
+--
+2.7.4
+