diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1880-drm-amd-powerplay-move-SMUM_WAIT_INDIRECT_FIELD_UNEQ.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1880-drm-amd-powerplay-move-SMUM_WAIT_INDIRECT_FIELD_UNEQ.patch | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1880-drm-amd-powerplay-move-SMUM_WAIT_INDIRECT_FIELD_UNEQ.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1880-drm-amd-powerplay-move-SMUM_WAIT_INDIRECT_FIELD_UNEQ.patch new file mode 100644 index 00000000..efc5acb8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1880-drm-amd-powerplay-move-SMUM_WAIT_INDIRECT_FIELD_UNEQ.patch @@ -0,0 +1,98 @@ +From 8ea369f03fba9e7514f6a525b0e6dc4d0b9f935f Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 20 Sep 2017 19:28:29 +0800 +Subject: [PATCH 1880/4131] drm/amd/powerplay: move + SMUM_WAIT_INDIRECT_FIELD_UNEQUAL to hwmgr.h + +the macro is not relevent to SMU, so move to hwmgr.h +and rename to PHM_WAIT_INDIRECT_FIELD_UNEQUAL + +Change-Id: I48aedbde30116a238ebce244e3769a05bf4466c1 +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 13 +++++++++++++ + drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 11 +---------- + drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 2 +- + drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 2 +- + 4 files changed, 16 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index 1c605f9..277d260 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -889,4 +889,17 @@ extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_t + PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \ + << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field)) + ++#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ ++ phm_wait_for_indirect_register_unequal(hwmgr, \ ++ mm##port##_INDEX, index, value, mask) ++ ++#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ ++ PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) ++ ++#define PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \ ++ PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \ ++ (fieldval) << PHM_FIELD_SHIFT(reg, field), \ ++ PHM_FIELD_MASK(reg, field) ) ++ ++ + #endif /* _HWMGR_H_ */ +diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h +index 54b151b..c64abd5 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h +@@ -117,6 +117,7 @@ extern void smum_wait_for_indirect_register_unequal( + uint32_t indirect_port, uint32_t index, + uint32_t value, uint32_t mask); + ++ + extern int smu_allocate_memory(void *device, uint32_t size, + enum cgs_gpu_mem_type type, + uint32_t byte_align, uint64_t *mc_addr, +@@ -242,15 +243,5 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); + (fieldval) << SMUM_FIELD_SHIFT(reg, field), \ + SMUM_FIELD_MASK(reg, field)) + +-#define SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ +- smum_wait_for_indirect_register_unequal(hwmgr, \ +- mm##port##_INDEX, index, value, mask) +- +-#define SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \ +- SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask) +- +-#define SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \ +- SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, (fieldval) << SMUM_FIELD_SHIFT(reg, field), \ +- SMUM_FIELD_MASK(reg, field) ) + + #endif +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +index eafac95..d40f4a3 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +@@ -63,7 +63,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) + int result = 0; + + /* Wait for smc boot up */ +- /* SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, ++ /* PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, + RCU_UC_EVENTS, boot_seq_done, 0); */ + + SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c +index fd63d28..3a134ea 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c +@@ -137,7 +137,7 @@ static int iceland_smu_upload_firmware_image(struct pp_hwmgr *hwmgr) + } + + /* wait for smc boot up */ +- SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, ++ PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, + RCU_UC_EVENTS, boot_seq_done, 0); + + /* clear firmware interrupt enable flag */ +-- +2.7.4 + |