diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1874-drm-amdgpu-simplify-pinning-into-visible-VRAM.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1874-drm-amdgpu-simplify-pinning-into-visible-VRAM.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1874-drm-amdgpu-simplify-pinning-into-visible-VRAM.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1874-drm-amdgpu-simplify-pinning-into-visible-VRAM.patch new file mode 100644 index 00000000..042f9c5b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1874-drm-amdgpu-simplify-pinning-into-visible-VRAM.patch @@ -0,0 +1,63 @@ +From d5dc3869b3ccf0e712dca29575e82c1dd11d9c2c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 11 Sep 2017 17:29:26 +0200 +Subject: [PATCH 1874/4131] drm/amdgpu: simplify pinning into visible VRAM +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Just set the CPU access required flag when we pin it. + +Change-Id: Ibd8cab0324437eb65ce5b58bb3bb28b156aa4d2f +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 23 ++++++++--------------- + 1 file changed, 8 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +index 8ba6f62..c560f1b 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +@@ -676,7 +676,6 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, + { + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); + int r, i; +- unsigned fpfn, lpfn; + + if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm)) + return -EPERM; +@@ -712,22 +711,16 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, + } + + bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS; ++ /* force to pin into visible video ram */ ++ if (!(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) ++ bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; + amdgpu_ttm_placement_from_domain(bo, domain); + for (i = 0; i < bo->placement.num_placement; i++) { +- /* force to pin into visible video ram */ +- if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) && +- !(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) && +- (!max_offset || max_offset > +- adev->mc.visible_vram_size)) { +- if (WARN_ON_ONCE(min_offset > +- adev->mc.visible_vram_size)) +- return -EINVAL; +- fpfn = min_offset >> PAGE_SHIFT; +- lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT; +- } else { +- fpfn = min_offset >> PAGE_SHIFT; +- lpfn = max_offset >> PAGE_SHIFT; +- } ++ unsigned fpfn, lpfn; ++ ++ fpfn = min_offset >> PAGE_SHIFT; ++ lpfn = max_offset >> PAGE_SHIFT; ++ + if (fpfn > bo->placements[i].fpfn) + bo->placements[i].fpfn = fpfn; + if (!bo->placements[i].lpfn || +-- +2.7.4 + |