diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1861-drm-amd-powerplay-implement-register-thermal-interru.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1861-drm-amd-powerplay-implement-register-thermal-interru.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1861-drm-amd-powerplay-implement-register-thermal-interru.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1861-drm-amd-powerplay-implement-register-thermal-interru.patch new file mode 100644 index 00000000..693ec557 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1861-drm-amd-powerplay-implement-register-thermal-interru.patch @@ -0,0 +1,67 @@ +From f29a3251643565c14253780afdf6e6f83990f707 Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinHuiEric.Huang@amd.com> +Date: Fri, 15 Sep 2017 16:43:38 -0400 +Subject: [PATCH 1861/4131] drm/amd/powerplay: implement register thermal + interrupt for Vega10 + +Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 34 +++++++++++++++++++++- + 1 file changed, 33 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index d278174..b8a2fca 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -5004,6 +5004,38 @@ static int vega10_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value) + return 0; + } + ++static int vega10_register_thermal_interrupt(struct pp_hwmgr *hwmgr, ++ const void *info) ++{ ++ struct cgs_irq_src_funcs *irq_src = ++ (struct cgs_irq_src_funcs *)info; ++ ++ if (hwmgr->thermal_controller.ucType == ++ ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10 || ++ hwmgr->thermal_controller.ucType == ++ ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL) { ++ PP_ASSERT_WITH_CODE(!cgs_add_irq_source(hwmgr->device, ++ 0xf, /* AMDGPU_IH_CLIENTID_THM */ ++ 0, 0, irq_src[0].set, irq_src[0].handler, hwmgr), ++ "Failed to register high thermal interrupt!", ++ return -EINVAL); ++ PP_ASSERT_WITH_CODE(!cgs_add_irq_source(hwmgr->device, ++ 0xf, /* AMDGPU_IH_CLIENTID_THM */ ++ 1, 0, irq_src[1].set, irq_src[1].handler, hwmgr), ++ "Failed to register low thermal interrupt!", ++ return -EINVAL); ++ } ++ ++ /* Register CTF(GPIO_19) interrupt */ ++ PP_ASSERT_WITH_CODE(!cgs_add_irq_source(hwmgr->device, ++ 0x16, /* AMDGPU_IH_CLIENTID_ROM_SMUIO, */ ++ 83, 0, irq_src[2].set, irq_src[2].handler, hwmgr), ++ "Failed to register CTF thermal interrupt!", ++ return -EINVAL); ++ ++ return 0; ++} ++ + static const struct pp_hwmgr_func vega10_hwmgr_funcs = { + .backend_init = vega10_hwmgr_backend_init, + .backend_fini = vega10_hwmgr_backend_fini, +@@ -5057,7 +5089,7 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = { + .get_mclk_od = vega10_get_mclk_od, + .set_mclk_od = vega10_set_mclk_od, + .avfs_control = vega10_avfs_enable, +- .start_thermal_controller = vega10_start_thermal_controller, ++ .register_internal_thermal_interrupt = vega10_register_thermal_interrupt, + }; + + int vega10_hwmgr_init(struct pp_hwmgr *hwmgr) +-- +2.7.4 + |