diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1844-drm-amdgpu-sriov-move-in_reset-to-adev-and-rename.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1844-drm-amdgpu-sriov-move-in_reset-to-adev-and-rename.patch | 130 |
1 files changed, 130 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1844-drm-amdgpu-sriov-move-in_reset-to-adev-and-rename.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1844-drm-amdgpu-sriov-move-in_reset-to-adev-and-rename.patch new file mode 100644 index 00000000..a6bbbfb4 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1844-drm-amdgpu-sriov-move-in_reset-to-adev-and-rename.patch @@ -0,0 +1,130 @@ +From ebd58f7b0877482105f8300f6c805bb0c311e4fa Mon Sep 17 00:00:00 2001 +From: Monk Liu <Monk.Liu@amd.com> +Date: Fri, 15 Sep 2017 18:57:12 +0800 +Subject: [PATCH 1844/4131] drm/amdgpu/sriov:move in_reset to adev and rename +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +currently in_reset is only used in sriov gpu reset, and it +will be used for other non-gfx hw component later, like +PSP, so move it from gfx to adev and rename to in_sriov_reset +make more sense. + +Change-Id: Ibb8546f6e4635a1cca740e57f6244f158c70a1e6 +Signed-off-by: Monk Liu <Monk.Liu@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 +++--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 6 +++--- + 4 files changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index dadbe4c..4419415 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1044,7 +1044,6 @@ struct amdgpu_gfx { + /* reset mask */ + uint32_t grbm_soft_reset; + uint32_t srbm_soft_reset; +- bool in_reset; + /* s3/s4 mask */ + bool in_suspend; + /* NGG */ +@@ -1661,6 +1660,7 @@ struct amdgpu_device { + + /* record last mm index being written through WREG32*/ + unsigned long last_mm_index; ++ bool in_sriov_reset; + }; + + static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 8570f6d..a7e84fe 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -2774,7 +2774,7 @@ int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job) + + mutex_lock(&adev->virt.lock_reset); + atomic_inc(&adev->gpu_reset_counter); +- adev->gfx.in_reset = true; ++ adev->in_sriov_reset = true; + + /* block TTM */ + resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev); +@@ -2885,7 +2885,7 @@ int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job) + dev_info(adev->dev, "GPU reset successed!\n"); + } + +- adev->gfx.in_reset = false; ++ adev->in_sriov_reset = false; + mutex_unlock(&adev->virt.lock_reset); + return r; + } +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 9a0a795..2469a4e 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -4814,7 +4814,7 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring) + + gfx_v8_0_kiq_setting(ring); + +- if (adev->gfx.in_reset) { /* for GPU_RESET case */ ++ if (adev->in_sriov_reset) { /* for GPU_RESET case */ + /* reset MQD to a clean status */ + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); +@@ -4851,7 +4851,7 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) + struct vi_mqd *mqd = ring->mqd_ptr; + int mqd_idx = ring - &adev->gfx.compute_ring[0]; + +- if (!adev->gfx.in_reset && !adev->gfx.in_suspend) { ++ if (!adev->in_sriov_reset && !adev->gfx.in_suspend) { + memset((void *)mqd, 0, sizeof(struct vi_mqd_allocation)); + ((struct vi_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF; + ((struct vi_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF; +@@ -4863,7 +4863,7 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) + + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation)); +- } else if (adev->gfx.in_reset) { /* for GPU_RESET case */ ++ } else if (adev->in_sriov_reset) { /* for GPU_RESET case */ + /* reset MQD to a clean status */ + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 2dc1cef..2a3fad0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -2698,7 +2698,7 @@ static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring) + + gfx_v9_0_kiq_setting(ring); + +- if (adev->gfx.in_reset) { /* for GPU_RESET case */ ++ if (adev->in_sriov_reset) { /* for GPU_RESET case */ + /* reset MQD to a clean status */ + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); +@@ -2736,7 +2736,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring) + struct v9_mqd *mqd = ring->mqd_ptr; + int mqd_idx = ring - &adev->gfx.compute_ring[0]; + +- if (!adev->gfx.in_reset && !adev->gfx.in_suspend) { ++ if (!adev->in_sriov_reset && !adev->gfx.in_suspend) { + memset((void *)mqd, 0, sizeof(struct v9_mqd_allocation)); + ((struct v9_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF; + ((struct v9_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF; +@@ -2748,7 +2748,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring) + + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); +- } else if (adev->gfx.in_reset) { /* for GPU_RESET case */ ++ } else if (adev->in_sriov_reset) { /* for GPU_RESET case */ + /* reset MQD to a clean status */ + if (adev->gfx.mec.mqd_backup[mqd_idx]) + memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); +-- +2.7.4 + |