summaryrefslogtreecommitdiffstats
path: root/drivers/bus/ti-sysc.c
AgeCommit message (Expand)Author
2019-10-18bus: ti-sysc: Fix watchdog quirk handlingTony Lindgren
2019-09-30Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc...Linus Torvalds
2019-09-06bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle()Tony Lindgren
2019-09-05bus: ti-sysc: Fix handling of invalid clocksTony Lindgren
2019-09-05bus: ti-sysc: Fix clock handling for no-idle quirksTony Lindgren
2019-08-26bus: ti-sysc: Detect d2d when debug is enabledTony Lindgren
2019-08-26bus: ti-sysc: Add module enable quirk for SGX on omap36xxTony Lindgren
2019-08-26bus: ti-sysc: Change return types of functionsNishka Dasgupta
2019-08-13bus: ti-sysc: remove set but not used variable 'quirks'YueHaibing
2019-08-13bus: ti-sysc: allow reset sharing across devicesTero Kristo
2019-08-13bus: ti-sysc: rework the reset handlingTero Kristo
2019-08-13bus: ti-sysc: re-order the clkdm control around reset handlingTero Kristo
2019-08-13bus: ti-sysc: Add missing kerneldoc commentsSuman Anna
2019-08-13bus: ti-sysc: Switch to SPDX license identifierSuman Anna
2019-08-13bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()Suman Anna
2019-07-24ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7Tony Lindgren
2019-07-24bus: ti-sysc: Fix using configured sysc mask valueTony Lindgren
2019-07-24bus: ti-sysc: Fix handling of forced idleTony Lindgren
2019-06-10bus: ti-sysc: Add support for module specific reset quirksTony Lindgren
2019-05-28bus: ti-sysc: Detect uarts also on omap34xxTony Lindgren
2019-05-28bus: ti-sysc: Do rstctrl reset handling in two phasesTony Lindgren
2019-05-28bus: ti-sysc: Add support for disabling module without legacy modeTony Lindgren
2019-05-28bus: ti-sysc: Set ENAWAKEUP if availableTony Lindgren
2019-05-28bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren
2019-05-28bus: ti-sysc: Handle clockactivity for enable and disableTony Lindgren
2019-05-28bus: ti-sysc: Enable interconnect target module autoidle bit on enableTony Lindgren
2019-05-28bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not setTony Lindgren
2019-05-28bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bitsTony Lindgren
2019-05-28bus: ti-sysc: Support 16-bit writes tooTony Lindgren
2019-05-28bus: ti-sysc: Add support for missing clockdomain handlingTony Lindgren
2019-05-02bus: ti-sysc: Handle devices with no control registersTony Lindgren
2019-04-09bus: ti-sysc: Add generic enable/disable functionsRoger Quadros
2019-04-05bus: ti-sysc: Detect DMIC for debuggingTony Lindgren
2019-04-05bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren
2019-04-03bus: ti-sysc: Add quirk handling for external optional functional clockTony Lindgren
2019-04-03bus: ti-sysc: Add support for early quirks based on register addressTony Lindgren
2019-04-03bus: ti-sysc: Move rstctrl reset to happen laterTony Lindgren
2019-04-03bus: ti-sysc: Manage clocks for the interconnect target module in all casesTony Lindgren
2019-04-03bus: ti-sysc: Allocate mdata as needed and do platform data based init laterTony Lindgren
2019-04-03bus: ti-sysc: Enable all clocks directly during init to read revisionTony Lindgren
2019-04-01bus: ti-sysc: Add separate functions for handling clocksTony Lindgren
2019-04-01bus: ti-sysc: Move legacy platform data idling into separate functionsTony Lindgren
2019-04-01bus: ti-sysc: Make functions staticTony Lindgren
2019-04-01bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-initTony Lindgren
2019-04-01bus: ti-sysc: Fix sysc_unprepare() when no clocks have been allocatedTony Lindgren
2019-01-29Merge branch 'pwm-dmtimer-fixes' into omap-for-v5.0/fixes-v2Tony Lindgren
2019-01-29bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe()Tony Lindgren
2018-12-10bus: ti-sysc: Check for no-reset and no-idle flags at the child levelTony Lindgren
2018-11-15bus: ti-sysc: Detect devices for debug on omap5Tony Lindgren
2018-11-15bus: ti-sysc: Add mcasp optional clocks flagTony Lindgren
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-14 10:31:47 +0000