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path: root/arch/riscv/include/asm/cpufeature.h
AgeCommit message (Expand)Author
2024-02-09work around gcc bugs with 'asm goto' with outputsLinus Torvalds
2024-01-17Merge patch series "riscv: Add fine-tuned checksum functions"Palmer Dabbelt
2024-01-17riscv: Add static key for misaligned accessesCharlie Jenkins
2023-12-12riscv: add ISA extension parsing for scalar cryptoEvan Green
2023-11-09riscv: Rearrange hwcap.h and cpufeature.hXiao Wang
2023-11-07RISC-V: Probe misaligned access speed in parallelEvan Green
2023-11-05Merge patch series "Add support to handle misaligned accesses in S-mode"Palmer Dabbelt
2023-11-01riscv: report misaligned accesses emulation to hwprobeClément Léger
2023-09-21RISC-V: Enable cbo.zero in usermodeAndrew Jones
2023-09-01RISC-V: Probe for unaligned access speedEvan Green
2023-06-19RISC-V: Track ISA extensions per hartEvan Green
2023-04-18RISC-V: hwprobe: Support probing of misaligned access performanceEvan Green
2023-04-18RISC-V: Move struct riscv_cpuinfo to new headerEvan Green