Age | Commit message (Expand) | Author |
---|---|---|
2023-01-25 | Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM" | Conor Dooley |
2023-01-25 | riscv: dts: microchip: add the Aldec TySoM's devicetree | Conor Dooley |
2022-12-27 | RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO | Conor Dooley |
2022-09-27 | riscv: dts: microchip: add a devicetree for aries' m100pfsevp | Conor Dooley |
2022-09-27 | riscv: dts: microchip: add sevkit device tree | Vattipalli Praveen |
2022-06-01 | riscv: dts: microchip: add the sundance polarberry | Conor Dooley |
2022-06-01 | riscv: dts: microchip: remove soc vendor from filenames | Conor Dooley |
2021-06-11 | riscv: Fix BUILTIN_DTB for sifive and microchip soc | Alexandre Ghiti |
2021-04-26 | RISC-V: Initial DTS for Microchip ICICLE board | Atish Patra |