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The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.
There's no change to dtbs_install as the flat structure is maintained on
install.
The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
company (e.g. gemini, nspire)
The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
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Add a BIOS flash chip to the DTS to open a possibility to reflash the
main CPU BIOS from the BMC.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111113934.1176-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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BMC UART1 is connected to the P0 CPU UART1. As the connection has
CTS and RTS signals, enable these functions on the BMC side.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111115227.1357-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add label "bmc" for the flash master partition. The master partition
is required for the firmware update in the OpenBMC ecosystem.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111100105.707-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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BMC on the EthanolX board uses 24LC128 EEPROM chip for the
configuration settings. The correct compatible string for this
chip is "atmel,24c128".
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111113208.964-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable Virtual UART (VUART) module. This module provides virtual serial
communication capabilities between host CPU and BMC and can be used for
the Serial-Over-LAN (SoL) feature implementation.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111121917.1636-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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AMD EthanolX CRB uses 24LC128 EEPROM chip to store its FRU information.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20210909132053.3919-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Most of the aspeed boards have copied the 'earlyprink' string in
the bootargs. However, there's no earlyprink driver configured in the
defconfigs, so this does nothing.
A combination of setting stdout in the chosen node and adding earlycon
to bootargs causes early serial output to appear early. This changes all
boards to use this option.
The console=ttyS4,115200 option is still required, as this is used by
the run time uart driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Alexander Filippov <a.filippov@yadro.com>
Link: https://lore.kernel.org/r/20210526051220.136432-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable all I2C busses that are used in AMD EthanolX CRB:
i2c0 - APML P0
i2c1 - APML P1
i2c2 - FPGA
i2c3 - 24LC128 EEPROM
i2c4 - P0 Power regulators
i2c5 - P1 Power regulators
i2c6 - P0/P1 Thermal diode
i2c7 - Thermal Sensors
i2c8 - BMC I2C
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20210415155300.1135-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add GPIO line names for AMD EthanolX customer reference board.
It populates AST2500 GPIO lines (A0-A7 to AC0-AC7) with AMD EthanolX
designated names.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Link: https://lore.kernel.org/r/20201111132133.1253-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable the USB 2.0 Virtual Hub Controller and
the Video Engine with it's reserved memory region for the implementation
of the iKVM functionality in the BMC.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201027123722.2935-3-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The KCS interface on the LPC channel 3 in the controller
is used for the in-band BMC<->BIOS IPMI communication.
0xCA2 is a default host CPU LPC IO address for this
interface.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201027123722.2935-2-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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KCS nodes compatible property was changed in the dtsi to use v2 binding
before ethanolx was merged, making the ethanolx device tree incorrect.
Update it to use the new binding so the driver loads.
Fixes: fa4c8ec6feaa ("ARM: dts: aspeed: Change KCS nodes to v2 binding")
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201027123722.2935-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Initial introduction of AMD EthanolX platform equipped with an
Aspeed ast2500 BMC manufactured by AMD.
AMD EthanolX platform is an AMD customer reference board with an
Aspeed ast2500 BMC manufactured by AMD.
This adds AMD EthanolX device tree file including the flash layout
used by EthanolX BMC machines.
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Rob Herring
Konstantin Aladyshev
Joel Stanley
Supreeth Venkatesh