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2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-28ARM: dts: armada: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: armada-370-seagate-personal-cloud.dtb: gpio-leds: 'red-sata0' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-06-27ARM: dts: marvell: correct gpio-keys propertiesKrzysztof Kozlowski
gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-14-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: marvell: align gpio-key node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-13-krzysztof.kozlowski@linaro.org
2018-05-18ARM: dts: armada-370-xp: update NAND node with new bindingsMiquel Raynal
Use the new bindings of the Marvell NAND controller driver. Also adapt the NAND controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the new driver activates the arbiter by default for all boards which is either needed or harmless. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada ↵Gregory CLEMENT
based board Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2016-11-19ARM: dts: armada-370-xp: Remove button address and fixup namesGregory CLEMENT
The gpio-key nodes do not have a reg property, so remove the address from the unit name. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: Fixup memory DT warningGregory CLEMENT
memory has a reg property so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370: Fixup pcie DT warningsGregory CLEMENT
PCIe has a ranges property, so the unit name should contain an address. Take the opportunity to use the node label instead of the full name. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: Fixup mdio DT warningGregory CLEMENT
MDIO has a reg property so the unit name should contain an address. Take the opportunity to use the node label instead of the full name. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-10-12ARM: mvebu: add DT support for Seagate NAS 2 and 4-BayVincent Donnefort
This patch adds DT support for the Seagate NAS 2 and 4-Bay. Here are some information allowing to identify these devices: Product name | Seagate NAS 2-Bay | Seagate NAS 4-Bay Code name (board/PCB) | Dart 2-Bay | Dart 4-Bay Model name (case sticker) | SRPD20 | SRPD40 Material desc (product spec) | STCTxxxxxxx | STCUxxxxxxx Chipset list (common): - SoC Marvell Armada 370 88F6707, CPU @1.2GHz - SDRAM memory: 512MB DDR3 600MHz (16-bits bandwidth) - NAND flash 256MB, 8-bits (Micron MT29F2G08AAB or Hinyx H27U2G8F2CTR-BC) - 2 SATA II ports (SoC) - 1 Ethernet Gigabit ports (PHY Marvell 88E1518) - 2 USB3 host ports (PCIe controller ASM1042) - GPIO fan (4 speeds) - External I2C RTC (MCP7940NT) - 3 push buttons (power, backup and reset) - 2 SATA LEDs (bi-color, blue and red) - 1 power LED (bi-color, blue and red) Only on 4-Bay models: - 2 extra SATA III ports (PCIe AHCI controller Marvell 88SE9170) - 1 extra Ethernet Gigabit ports (PHY Marvell 88E1518) - I2C GPIO expander (PCA9554A) - 2 extra SATA LEDs (bi-color, blue and red) Note that support for the white SATA LEDs associated with HDDs 0 and 1 is missing. A dedicated LED driver is needed. Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>