diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/broadwellde/memory.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/broadwellde/memory.json | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/memory.json b/tools/perf/pmu-events/arch/x86/broadwellde/memory.json index 041b6ff4062e..31a74eed2f7d 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellde/memory.json +++ b/tools/perf/pmu-events/arch/x86/broadwellde/memory.json @@ -1,6 +1,7 @@ [ { "BriefDescription": "Number of times HLE abort was triggered", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED", "PEBS": "1", @@ -10,6 +11,7 @@ }, { "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED_MISC1", "PublicDescription": "Number of times an HLE abort was attributed to a Memory condition (See TSX_Memory event for additional details).", @@ -18,6 +20,7 @@ }, { "BriefDescription": "Number of times an HLE execution aborted due to uncommon conditions", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED_MISC2", "PublicDescription": "Number of times the TSX watchdog signaled an HLE abort.", @@ -26,6 +29,7 @@ }, { "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED_MISC3", "PublicDescription": "Number of times a disallowed operation caused an HLE abort.", @@ -34,6 +38,7 @@ }, { "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED_MISC4", "PublicDescription": "Number of times HLE caused a fault.", @@ -42,6 +47,7 @@ }, { "BriefDescription": "Number of times an HLE execution aborted due to none of the previous 4 categories (e.g. interrupts)", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.ABORTED_MISC5", "PublicDescription": "Number of times HLE aborted and was not due to the abort conditions in subevents 3-6.", @@ -50,6 +56,7 @@ }, { "BriefDescription": "Number of times HLE commit succeeded", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.COMMIT", "PublicDescription": "Number of times HLE commit succeeded.", @@ -58,6 +65,7 @@ }, { "BriefDescription": "Number of times we entered an HLE region; does not count nested transactions", + "Counter": "0,1,2,3", "EventCode": "0xc8", "EventName": "HLE_RETIRED.START", "PublicDescription": "Number of times we entered an HLE region\n does not count nested transactions.", @@ -66,6 +74,7 @@ }, { "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", + "Counter": "0,1,2,3", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", "PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:\n1. memory disambiguation,\n2. external snoop, or\n3. cross SMT-HW-thread snoop (stores) hitting load buffer.", @@ -74,6 +83,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 128", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -87,6 +97,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 16", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -100,6 +111,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 256", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -113,6 +125,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 32", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -126,6 +139,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 4", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -139,6 +153,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 512", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -152,6 +167,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 64", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -165,6 +181,7 @@ }, { "BriefDescription": "Randomly selected loads with latency value being above 8", + "Counter": "3", "Data_LA": "1", "Errata": "BDM100, BDM35", "EventCode": "0xcd", @@ -178,6 +195,7 @@ }, { "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache", + "Counter": "0,1,2,3", "EventCode": "0x05", "EventName": "MISALIGN_MEM_REF.LOADS", "PublicDescription": "This event counts speculative cache-line split load uops dispatched to the L1 cache.", @@ -186,6 +204,7 @@ }, { "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache", + "Counter": "0,1,2,3", "EventCode": "0x05", "EventName": "MISALIGN_MEM_REF.STORES", "PublicDescription": "This event counts speculative cache line split store-address (STA) uops dispatched to the L1 cache.", @@ -194,6 +213,7 @@ }, { "BriefDescription": "Number of times RTM abort was triggered", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED", "PEBS": "1", @@ -203,6 +223,7 @@ }, { "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED_MISC1", "PublicDescription": "Number of times an RTM abort was attributed to a Memory condition (See TSX_Memory event for additional details).", @@ -211,6 +232,7 @@ }, { "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g., read/write capacity and conflicts).", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED_MISC2", "PublicDescription": "Number of times the TSX watchdog signaled an RTM abort.", @@ -219,6 +241,7 @@ }, { "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED_MISC3", "PublicDescription": "Number of times a disallowed operation caused an RTM abort.", @@ -227,6 +250,7 @@ }, { "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED_MISC4", "PublicDescription": "Number of times a RTM caused a fault.", @@ -235,6 +259,7 @@ }, { "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.ABORTED_MISC5", "PublicDescription": "Number of times RTM aborted and was not due to the abort conditions in subevents 3-6.", @@ -243,6 +268,7 @@ }, { "BriefDescription": "Number of times RTM commit succeeded", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.COMMIT", "PublicDescription": "Number of times RTM commit succeeded.", @@ -251,6 +277,7 @@ }, { "BriefDescription": "Number of times we entered an RTM region; does not count nested transactions", + "Counter": "0,1,2,3", "EventCode": "0xc9", "EventName": "RTM_RETIRED.START", "PublicDescription": "Number of times we entered an RTM region\n does not count nested transactions.", @@ -259,6 +286,7 @@ }, { "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.", + "Counter": "0,1,2,3", "EventCode": "0x5d", "EventName": "TX_EXEC.MISC1", "SampleAfterValue": "2000003", @@ -266,6 +294,7 @@ }, { "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region", + "Counter": "0,1,2,3", "EventCode": "0x5d", "EventName": "TX_EXEC.MISC2", "PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.", @@ -274,6 +303,7 @@ }, { "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded", + "Counter": "0,1,2,3", "EventCode": "0x5d", "EventName": "TX_EXEC.MISC3", "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.", @@ -282,6 +312,7 @@ }, { "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.", + "Counter": "0,1,2,3", "EventCode": "0x5d", "EventName": "TX_EXEC.MISC4", "PublicDescription": "RTM region detected inside HLE.", @@ -290,6 +321,7 @@ }, { "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.", + "Counter": "0,1,2,3", "EventCode": "0x5d", "EventName": "TX_EXEC.MISC5", "SampleAfterValue": "2000003", @@ -297,6 +329,7 @@ }, { "BriefDescription": "Number of times a TSX Abort was triggered due to an evicted line caused by a transaction overflow", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_CAPACITY_WRITE", "PublicDescription": "Number of times a TSX Abort was triggered due to an evicted line caused by a transaction overflow.", @@ -305,6 +338,7 @@ }, { "BriefDescription": "Number of times a TSX line had a cache conflict", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_CONFLICT", "PublicDescription": "Number of times a TSX line had a cache conflict.", @@ -313,6 +347,7 @@ }, { "BriefDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.", @@ -321,6 +356,7 @@ }, { "BriefDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.", @@ -329,6 +365,7 @@ }, { "BriefDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.", @@ -337,6 +374,7 @@ }, { "BriefDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.", @@ -345,6 +383,7 @@ }, { "BriefDescription": "Number of times we could not allocate Lock Buffer", + "Counter": "0,1,2,3", "EventCode": "0x54", "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL", "PublicDescription": "Number of times we could not allocate Lock Buffer.", |