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-rw-r--r--arch/mips/boot/dts/ingenic/ci20.dts152
-rw-r--r--arch/mips/boot/dts/ingenic/jz4725b.dtsi7
-rw-r--r--arch/mips/boot/dts/ingenic/jz4740.dtsi7
-rw-r--r--arch/mips/boot/dts/ingenic/jz4770.dtsi5
-rw-r--r--arch/mips/boot/dts/ingenic/qi_lb60.dts6
-rw-r--r--arch/mips/boot/dts/ingenic/x1000.dtsi18
-rw-r--r--arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi7
-rw-r--r--arch/mips/boot/dts/loongson/ls7a-pch.dtsi7
-rw-r--r--arch/mips/boot/dts/mscc/serval_common.dtsi2
-rw-r--r--arch/mips/boot/dts/pic32/pic32mzda.dtsi2
-rw-r--r--arch/mips/boot/dts/ralink/Makefile3
-rw-r--r--arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dts84
-rw-r--r--arch/mips/boot/dts/ralink/mt7628a.dtsi40
13 files changed, 251 insertions, 89 deletions
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 239c4537484d..a141a699b790 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -67,14 +67,14 @@
};
};
- eth0_power: fixedregulator@0 {
+ eth0_power: fixedregulator-0 {
compatible = "regulator-fixed";
regulator-name = "eth0_power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
+ gpio = <&gpb 25 0>;
enable-active-high;
};
@@ -97,25 +97,64 @@
gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
};
- wlan0_power: fixedregulator@1 {
+ bt_power: fixedregulator-1 {
compatible = "regulator-fixed";
- regulator-name = "wlan0_power";
+ regulator-name = "bt_power";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <1400>;
+
+ vin-supply = <&vcc_50>;
- gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
+ gpio = <&gpb 19 0>;
enable-active-high;
};
- otg_power: fixedregulator@2 {
+ otg_power: fixedregulator-2 {
compatible = "regulator-fixed";
regulator-name = "otg_power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpf 15 GPIO_ACTIVE_LOW>;
+ gpio = <&gpf 15 0>;
enable-active-high;
};
+
+ wifi_power: fixedregulator-4 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "wifi_power";
+
+ /*
+ * Technically it's 5V, the WiFi chip has its own internal
+ * regulators; but the MMC/SD subsystem won't accept such a
+ * value.
+ */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <150000>;
+
+ vin-supply = <&bt_power>;
+ };
+
+ vcc_33v: fixedregulator-5 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "vcc_33v";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ wifi_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
+
+ clocks = <&rtc_dev>;
+ clock-names = "ext_clock";
+ };
};
&ext {
@@ -129,10 +168,11 @@
*/
assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
<&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
- <&cgu JZ4780_CLK_HDMI>;
+ <&cgu JZ4780_CLK_HDMI>, <&cgu JZ4780_CLK_MSCMUX>;
assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
<&cgu JZ4780_CLK_MPLL>,
- <&cgu JZ4780_CLK_SSIPLL>;
+ <&cgu JZ4780_CLK_SSIPLL>,
+ <0>, <&cgu JZ4780_CLK_MPLL>;
assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
};
@@ -160,24 +200,33 @@
pinctrl-0 = <&pins_mmc0>;
cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vcc_33v>;
+ vqmmc-supply = <&vcc_33v>;
};
&mmc1 {
status = "okay";
bus-width = <4>;
- max-frequency = <50000000>;
+ max-frequency = <25000000>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ vmmc-supply = <&wifi_power>;
+ vqmmc-supply = <&wifi_io>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&pins_mmc1>;
- brcmf: wifi@1 {
-/* reg = <4>;*/
- compatible = "brcm,bcm4330-fmac";
- vcc-supply = <&wlan0_power>;
- device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+
+ interrupt-parent = <&gpd>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-names = "host-wake";
};
};
@@ -204,11 +253,20 @@
bluetooth {
compatible = "brcm,bcm4330-bt";
- reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
- vcc-supply = <&wlan0_power>;
+
+ vbat-supply = <&bt_power>;
+ vddio-supply = <&wifi_io>;
+
+ interrupt-parent = <&gpf>;
+ interrupts = <6 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wakeup";
+
+ clocks = <&rtc_dev>;
+ clock-names = "lpo";
+
+ reset-gpios = <&gpf 8 GPIO_ACTIVE_LOW>;
device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
+ shutdown-gpios = <&gpf 4 GPIO_ACTIVE_HIGH>;
};
};
@@ -237,59 +295,54 @@
act8600: act8600@5a {
compatible = "active-semi,act8600";
reg = <0x5a>;
- status = "okay";
regulators {
- vddcore: SUDCDC1 {
- regulator-name = "DCDC_REG1";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
+ vddcore: DCDC1 {
+ regulator-min-microvolt = <1125000>;
+ regulator-max-microvolt = <1125000>;
+ vp1-supply = <&vcc_33v>;
regulator-always-on;
};
- vddmem: SUDCDC2 {
- regulator-name = "DCDC_REG2";
+ vddmem: DCDC2 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
+ vp2-supply = <&vcc_33v>;
regulator-always-on;
};
- vcc_33: SUDCDC3 {
- regulator-name = "DCDC_REG3";
+ vcc_33: DCDC3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ vp3-supply = <&vcc_33v>;
regulator-always-on;
};
- vcc_50: SUDCDC4 {
- regulator-name = "SUDCDC_REG4";
+ vcc_50: SUDCDC_REG4 {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
- vcc_25: LDO_REG5 {
- regulator-name = "LDO_REG5";
+ vcc_25: LDO5 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
+ inl-supply = <&vcc_33v>;
regulator-always-on;
};
- wifi_io: LDO_REG6 {
- regulator-name = "LDO_REG6";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- regulator-always-on;
+ wifi_io: LDO6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-settling-time-us = <150000>;
+ inl-supply = <&vcc_33v>;
};
- vcc_28: LDO_REG7 {
- regulator-name = "LDO_REG7";
+ cim_io_28: LDO7 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
- regulator-always-on;
+ inl-supply = <&vcc_33v>;
};
- vcc_15: LDO_REG8 {
- regulator-name = "LDO_REG8";
+ cim_io_15: LDO8 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
- regulator-always-on;
+ inl-supply = <&vcc_33v>;
};
vrtc_18: LDO_REG9 {
- regulator-name = "LDO_REG9";
/* Despite the datasheet stating 3.3V
* for REG9 and the driver expecting that,
* REG9 outputs 1.8V.
@@ -303,7 +356,6 @@
regulator-always-on;
};
vcc_11: LDO_REG10 {
- regulator-name = "LDO_REG10";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
@@ -363,7 +415,7 @@
#address-cells = <1>;
#size-cells = <0>;
- ingenic,bch-controller = <&bch>;
+ ecc-engine = <&bch>;
ingenic,nemc-tAS = <10>;
ingenic,nemc-tAH = <5>;
@@ -429,8 +481,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pins_nemc_cs6>;
- reg = <6 0 1 /* addr */
- 6 2 1>; /* data */
+ reg = <6 0 1>, /* addr */
+ <6 2 1>; /* data */
ingenic,nemc-tAS = <15>;
ingenic,nemc-tAH = <10>;
@@ -442,7 +494,7 @@
vcc-supply = <&eth0_power>;
interrupt-parent = <&gpe>;
- interrupts = <19 4>;
+ interrupts = <19 IRQ_TYPE_EDGE_RISING>;
nvmem-cells = <&eth0_addr>;
nvmem-cell-names = "mac-address";
diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
index e9e48022f631..acbbe8c4664c 100644
--- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
@@ -198,11 +198,8 @@
#sound-dai-cells = <0>;
- clocks = <&cgu JZ4725B_CLK_AIC>,
- <&cgu JZ4725B_CLK_I2S>,
- <&cgu JZ4725B_CLK_EXT>,
- <&cgu JZ4725B_CLK_PLL_HALF>;
- clock-names = "aic", "i2s", "ext", "pll half";
+ clocks = <&cgu JZ4725B_CLK_AIC>, <&cgu JZ4725B_CLK_I2S>;
+ clock-names = "aic", "i2s";
interrupt-parent = <&intc>;
interrupts = <10>;
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 7f76cba03a08..bdd6f4d82ec9 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -192,11 +192,8 @@
interrupt-parent = <&intc>;
interrupts = <18>;
- clocks = <&cgu JZ4740_CLK_AIC>,
- <&cgu JZ4740_CLK_I2S>,
- <&cgu JZ4740_CLK_EXT>,
- <&cgu JZ4740_CLK_PLL_HALF>;
- clock-names = "aic", "i2s", "ext", "pll half";
+ clocks = <&cgu JZ4740_CLK_AIC>, <&cgu JZ4740_CLK_I2S>;
+ clock-names = "aic", "i2s";
dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
dma-names = "rx", "tx";
diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi
index bda0a3a86ed5..9c0099919db7 100644
--- a/arch/mips/boot/dts/ingenic/jz4770.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
@@ -238,9 +238,8 @@
#sound-dai-cells = <0>;
- clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
- <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
- clock-names = "aic", "i2s", "ext", "pll half";
+ clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>;
+ clock-names = "aic", "i2s";
interrupt-parent = <&intc>;
interrupts = <34>;
diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index ba0218971572..24f987244a12 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -27,7 +27,7 @@
stdout-path = &uart0;
};
- vcc: regulator@0 {
+ vcc: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "vcc";
@@ -36,7 +36,7 @@
regulator-always-on;
};
- mmc_power: regulator@1 {
+ mmc_power: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "mmc_vcc";
gpio = <&gpd 2 0>;
@@ -45,7 +45,7 @@
regulator-max-microvolt = <3300000>;
};
- amp_supply: regulator@2 {
+ amp_supply: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "amp_supply";
gpio = <&gpd 4 0>;
diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
index 42e69664efd9..cc264cfff826 100644
--- a/arch/mips/boot/dts/ingenic/x1000.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1000.dtsi
@@ -417,4 +417,22 @@
status = "disabled";
};
+
+ aic: audio-controller@10020000 {
+ compatible = "ingenic,x1000-i2s";
+ reg = <0x10020000 0x38>;
+
+ #sound-dai-cells = <0>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <1>;
+
+ clocks = <&cgu X1000_CLK_AIC>,
+ <&cgu X1000_CLK_I2S>;
+ clock-names = "aic", "i2s";
+
+ dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
+ <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
+ dma-names = "rx", "tx";
+ };
};
diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 8143a61111e3..f878f47e4501 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -97,6 +97,13 @@
<0x00000000>; /* int3 */
};
+ rtc0: rtc@1fe07800 {
+ compatible = "loongson,ls2k1000-rtc";
+ reg = <0 0x1fe07800 0 0x78>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
+ };
+
uart0: serial@1fe00000 {
compatible = "ns16550a";
reg = <0 0x1fe00000 0 0x8>;
diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 2f45fce2cdc4..7c69e8245c2f 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -19,6 +19,13 @@
#interrupt-cells = <2>;
};
+ rtc0: rtc@100d0100 {
+ compatible = "loongson,ls7a-rtc";
+ reg = <0 0x100d0100 0 0x78>;
+ interrupt-parent = <&pic>;
+ interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
ls7a_uart0: serial@10080000 {
compatible = "ns16550a";
reg = <0 0x10080000 0 0x100>;
diff --git a/arch/mips/boot/dts/mscc/serval_common.dtsi b/arch/mips/boot/dts/mscc/serval_common.dtsi
index 0893de420e27..5dc1eac49e50 100644
--- a/arch/mips/boot/dts/mscc/serval_common.dtsi
+++ b/arch/mips/boot/dts/mscc/serval_common.dtsi
@@ -20,7 +20,7 @@
stdout-path = "serial0:115200n8";
};
- i2c0_imux: i2c0-imux{
+ i2c0_imux: i2c0-imux {
compatible = "i2c-mux-pinctrl";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/mips/boot/dts/pic32/pic32mzda.dtsi b/arch/mips/boot/dts/pic32/pic32mzda.dtsi
index f1e3dad6bead..fdc721b414a8 100644
--- a/arch/mips/boot/dts/pic32/pic32mzda.dtsi
+++ b/arch/mips/boot/dts/pic32/pic32mzda.dtsi
@@ -75,7 +75,7 @@
microchip,external-irqs = <3 8 13 18 23>;
};
- pic32_pinctrl: pinctrl@1f801400{
+ pic32_pinctrl: pinctrl@1f801400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "microchip,pic32mzda-pinctrl";
diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile
index 11732b8c8163..d27d7e8c700f 100644
--- a/arch/mips/boot/dts/ralink/Makefile
+++ b/arch/mips/boot/dts/ralink/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_DTB_VOCORE2) += vocore2.dtb
dtb-$(CONFIG_SOC_MT7621) += \
mt7621-gnubee-gb-pc1.dtb \
- mt7621-gnubee-gb-pc2.dtb
+ mt7621-gnubee-gb-pc2.dtb \
+ mt7621-tplink-hc220-g5-v1.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dts b/arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dts
new file mode 100644
index 000000000000..2d2eadc6b95f
--- /dev/null
+++ b/arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "tplink,hc220-g5-v1", "mediatek,mt7621-soc";
+ model = "TP-Link HC220 G5 v1";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>;
+ };
+
+ chosen {
+ bootargs = "earlycon console=ttyS0,115200";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-reset {
+ label = "reset";
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ key-wps {
+ label = "wps";
+ gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-fault {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_FAULT;
+ gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-power {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_POWER;
+ gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+
+ led-wps {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_WPS;
+ gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&switch0 {
+ ports {
+ port@0 {
+ status = "okay";
+ label = "lan2";
+ };
+
+ port@1 {
+ status = "okay";
+ label = "lan1";
+ };
+
+ port@2 {
+ status = "okay";
+ label = "wan";
+ };
+ };
+};
diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi
index 45bf96a3d17a..45a15e005cc4 100644
--- a/arch/mips/boot/dts/ralink/mt7628a.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi
@@ -51,85 +51,85 @@
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
- pinmux_gpio_gpio: pinmux_gpio_gpio {
+ pinmux_gpio_gpio: gpio-gpio-pins {
pinctrl-single,bits = <0x0 0x0 0x3>;
};
- pinmux_spi_cs1_cs: pinmux_spi_cs1_cs {
+ pinmux_spi_cs1_cs: spi-cs1-cs-pins {
pinctrl-single,bits = <0x0 0x0 0x30>;
};
- pinmux_i2s_gpio: pinmux_i2s_gpio {
+ pinmux_i2s_gpio: i2s-gpio-pins {
pinctrl-single,bits = <0x0 0x40 0xc0>;
};
- pinmux_uart0_uart: pinmux_uart0_uart0 {
+ pinmux_uart0_uart: uart0-uart0-pins {
pinctrl-single,bits = <0x0 0x0 0x300>;
};
- pinmux_sdmode_sdxc: pinmux_sdmode_sdxc {
+ pinmux_sdmode_sdxc: sdmode-sdxc-pins {
pinctrl-single,bits = <0x0 0x0 0xc00>;
};
- pinmux_sdmode_gpio: pinmux_sdmode_gpio {
+ pinmux_sdmode_gpio: sdmode-gpio-pins {
pinctrl-single,bits = <0x0 0x400 0xc00>;
};
- pinmux_spi_spi: pinmux_spi_spi {
+ pinmux_spi_spi: spi-spi-pins {
pinctrl-single,bits = <0x0 0x0 0x1000>;
};
- pinmux_refclk_gpio: pinmux_refclk_gpio {
+ pinmux_refclk_gpio: refclk-gpio-pins {
pinctrl-single,bits = <0x0 0x40000 0x40000>;
};
- pinmux_i2c_i2c: pinmux_i2c_i2c {
+ pinmux_i2c_i2c: i2c-i2c-pins {
pinctrl-single,bits = <0x0 0x0 0x300000>;
};
- pinmux_uart1_uart: pinmux_uart1_uart1 {
+ pinmux_uart1_uart: uart1-uart1-pins {
pinctrl-single,bits = <0x0 0x0 0x3000000>;
};
- pinmux_uart2_uart: pinmux_uart2_uart {
+ pinmux_uart2_uart: uart2-uart-pins {
pinctrl-single,bits = <0x0 0x0 0xc000000>;
};
- pinmux_pwm0_pwm: pinmux_pwm0_pwm {
+ pinmux_pwm0_pwm: pwm0-pwm-pins {
pinctrl-single,bits = <0x0 0x0 0x30000000>;
};
- pinmux_pwm0_gpio: pinmux_pwm0_gpio {
+ pinmux_pwm0_gpio: pwm0-gpio-pins {
pinctrl-single,bits = <0x0 0x10000000
0x30000000>;
};
- pinmux_pwm1_pwm: pinmux_pwm1_pwm {
+ pinmux_pwm1_pwm: pwm1-pwm-pins {
pinctrl-single,bits = <0x0 0x0 0xc0000000>;
};
- pinmux_pwm1_gpio: pinmux_pwm1_gpio {
+ pinmux_pwm1_gpio: pwm1-gpio-pins {
pinctrl-single,bits = <0x0 0x40000000
0xc0000000>;
};
- pinmux_p0led_an_gpio: pinmux_p0led_an_gpio {
+ pinmux_p0led_an_gpio: p0led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x4 0xc>;
};
- pinmux_p1led_an_gpio: pinmux_p1led_an_gpio {
+ pinmux_p1led_an_gpio: p1led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x10 0x30>;
};
- pinmux_p2led_an_gpio: pinmux_p2led_an_gpio {
+ pinmux_p2led_an_gpio: p2led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x40 0xc0>;
};
- pinmux_p3led_an_gpio: pinmux_p3led_an_gpio {
+ pinmux_p3led_an_gpio: p3led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x100 0x300>;
};
- pinmux_p4led_an_gpio: pinmux_p4led_an_gpio {
+ pinmux_p4led_an_gpio: p4led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x400 0xc00>;
};
};
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-06-23 05:07:11 +0000