Age | Commit message (Expand) | Author |
2009-04-10 | intel-iommu: Avoid panic() for DRHD at address zero. | ![](//seccdn.libravatar.org/avatar/e6e2b767c5c178f0b483c4aecdbba186?s=13&d=retro) David Woodhouse |
2009-04-04 | intel-iommu: Handle PCI domains appropriately. | ![](//seccdn.libravatar.org/avatar/e6e2b767c5c178f0b483c4aecdbba186?s=13&d=retro) David Woodhouse |
2009-04-03 | Intel IOMMU Suspend/Resume Support - Queued Invalidation | ![](//seccdn.libravatar.org/avatar/104b06b43a2b70afdf93d2357776131e?s=13&d=retro) Fenghua Yu |
2009-03-17 | x86, dmar: use atomic allocations for QI and Intr-remapping init | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2009-03-17 | x86, dmar: start with sane state while enabling dma and interrupt-remapping | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2009-03-17 | x86, dmar: routines for disabling queued invalidation and intr remapping | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2009-03-17 | x86, x2apic: enable fault handling for intr-remapping | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2009-03-17 | x86, dmar: move page fault handling code to dmar.c | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2009-03-01 | Merge branch 'x86/urgent' into x86/pat | ![](//seccdn.libravatar.org/avatar/a0e934a93318e87ffe558badbdcb2be8?s=13&d=retro) Ingo Molnar |
2009-02-14 | intel-iommu: fix endless "Unknown DMAR structure type" loop | ![](//seccdn.libravatar.org/avatar/d61538a05a611db1671e9df20b95fbb1?s=13&d=retro) Tony Battersby |
2009-02-11 | pci, x86, acpi: fix early_ioremap() leak | ![](//seccdn.libravatar.org/avatar/dcda7f018049c2aff2ce2aaceaff6196?s=13&d=retro) Yinghai Lu |
2009-02-09 | VT-d: handle Invalidation Queue Error to avoid system hang | ![](//seccdn.libravatar.org/avatar/d1bbc670718a2a66f997664c4f69a885?s=13&d=retro) Yu Zhao |
2009-02-09 | intel-iommu: fix build error with INTR_REMAP=y and DMAR=n | ![](//seccdn.libravatar.org/avatar/f23c0cf239243a9c632c004eec963f75?s=13&d=retro) Joerg Roedel |
2009-01-03 | calculate agaw for each iommu | ![](//seccdn.libravatar.org/avatar/2736575fd57a3966d883f170a14d5563?s=13&d=retro) Weidong Han |
2009-01-03 | VT-d: fix segment number being ignored when searching DRHD | ![](//seccdn.libravatar.org/avatar/d1bbc670718a2a66f997664c4f69a885?s=13&d=retro) Yu Zhao |
2008-10-21 | Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds... | ![](//seccdn.libravatar.org/avatar/e6e2b767c5c178f0b483c4aecdbba186?s=13&d=retro) David Woodhouse |
2008-10-20 | Merge branch 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/ker... | ![](//seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds |
2008-10-18 | dmar: fix uninitialised 'ret' variable in dmar_parse_dev() | ![](//seccdn.libravatar.org/avatar/e6e2b767c5c178f0b483c4aecdbba186?s=13&d=retro) David Woodhouse |
2008-10-18 | intel-iommu: IA64 support | ![](//seccdn.libravatar.org/avatar/104b06b43a2b70afdf93d2357776131e?s=13&d=retro) Fenghua Yu |
2008-10-17 | dmar: remove the quirk which disables dma-remapping when intr-remapping enabled | ![](//seccdn.libravatar.org/avatar/c918d7af77e80328859d2517c486f757?s=13&d=retro) Youquan Song |
2008-10-17 | dmar: context cache and IOTLB invalidation using queued invalidation | ![](//seccdn.libravatar.org/avatar/c918d7af77e80328859d2517c486f757?s=13&d=retro) Youquan Song |
2008-10-17 | dmar: use spin_lock_irqsave() in qi_submit_sync() | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-10-16 | dmar: fix dmar_parse_dev() devices_cnt error condition check | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-10-16 | dmar: use list_for_each_entry_safe() in dmar_dev_scope_init() | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-10-16 | dmar: initialize the return value in dmar_parse_dev() | ![](//seccdn.libravatar.org/avatar/ad3120ecae5ca98eb62b4b5e0c47be06?s=13&d=retro) Yinghai Lu |
2008-10-16 | dmar: fix using early fixmap mapping for DMAR table parsing | ![](//seccdn.libravatar.org/avatar/ad3120ecae5ca98eb62b4b5e0c47be06?s=13&d=retro) Yinghai Lu |
2008-10-15 | VT-d: Changes to support KVM | ![](//seccdn.libravatar.org/avatar/7bfcdf0c97e44dc85fd2b09ebddb1df3?s=13&d=retro) Kay, Allen M |
2008-07-12 | x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detec... | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: Interrupt remapping infrastructure | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d) | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: parse ioapic scope under vt-d structures | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Inter... | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-07-12 | x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization | ![](//seccdn.libravatar.org/avatar/96817e0a3d2f53494b99734a57f591b5?s=13&d=retro) Suresh Siddha |
2008-02-23 | copyright owner and author clean up for intel iommu and related files | ![](//seccdn.libravatar.org/avatar/84c4732cc720ecefa4e818240828c460?s=13&d=retro) mark gross |
2008-02-06 | Genericizing iova.[ch] | ![](//seccdn.libravatar.org/avatar/81279c43ce60f56aea992763d1ed612b?s=13&d=retro) David Miller |
2008-02-01 | PCI: More Sanity checks for DMAR | ![](//seccdn.libravatar.org/avatar/104b06b43a2b70afdf93d2357776131e?s=13&d=retro) Fenghua Yu |
2007-10-22 | Intel IOMMU: DMAR detection and parsing logic | ![](//seccdn.libravatar.org/avatar/96f43b31926f88bd23aa0df3d0463741?s=13&d=retro) Keshavamurthy, Anil S |