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path: root/drivers/gpu/drm/i915/intel_lrc.c
AgeCommit message (Expand)Author
2016-04-18drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno writeMichał Winiarski
2016-04-18drm/i915: Fixup the free space logic in ring_prepareAkash Goel
2016-02-26drm/i915: Execlists cannot pin a context without the objectChris Wilson
2016-02-26drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RSMichel Thierry
2016-02-26drm/i915/gen9: Set value of Indirect Context Offset based on gen versionMichel Thierry
2016-01-28drm/i915: Fix premature LRC unpin in GuC modeTvrtko Ursulin
2016-01-28drm/i915: Make LRC pinning own a reference to the contextTvrtko Ursulin
2016-01-28drm/i915: Make LRC (un)pinning work on context and engineTvrtko Ursulin
2016-01-25drm/i915/guc: Decouple GuC engine id from ring idAlex Dai
2016-01-25drm/i915: More use of the cached LRC stateTvrtko Ursulin
2016-01-21drm/i915: Seal busy-ioctl uABI and prevent leaking of internal idsChris Wilson
2016-01-21drm/i915: Use ordered seqno write interrupt generation on gen8+ execlistsChris Wilson
2016-01-21drm/i915: tidy up a few leftoversDave Gordon
2016-01-21drm/i915: abolish separate per-ring default_context pointersDave Gordon
2016-01-21drm/i915: simplify allocation of driver-internal requestsDave Gordon
2016-01-18drm/i915: Cache LRC state page in the contextTvrtko Ursulin
2016-01-18drm/i915: Cache ringbuffer GTT VMATvrtko Ursulin
2016-01-18drm/i915: Do not call API requiring struct_mutex where it is not availableTvrtko Ursulin
2016-01-15drm/i915: Make sure DC writes are coherent on flush.Francisco Jerez
2016-01-13drm/i915: Fix bsd2 ring nameTvrtko Ursulin
2016-01-13drm/i915: Compact logical ring interrupt initializationTvrtko Ursulin
2016-01-13drm/i915: Extract vfunc setup from logical ring initializersTvrtko Ursulin
2016-01-12drm/i915/bdw+: Replace list_del+list_add_tail with list_move_tailTvrtko Ursulin
2016-01-08drm/i915: Don't warn if the workaround list is empty part 2.Boyer, Wayne
2016-01-07drm/i915: Extract CSB status readBen Widawsky
2016-01-07drm/i915: Change WARN to ERROR in CSB countBen Widawsky
2016-01-07drm/i915: Cleanup some of the CSB handlingBen Widawsky
2016-01-05drm/i915: add kerneldoc for intel_lr_context_size()Dave Gordon
2016-01-05drm/i915/guc: Expose (intel)_lr_context_size()Dave Gordon
2016-01-05drm/i915/guc: Move GuC wq_check_space to alloc_request_extrasAlex Dai
2015-12-30drm/i915: Fix whitespace (trivial)Ben Widawsky
2015-12-21drm/i915: Limit VF cache invalidate workaround usage to gen9Ben Widawsky
2015-12-11drm/i915: mark GEM object pages dirty when mapped & written by the CPUDave Gordon
2015-12-10drm/i915: intel_ring_initialized() must be simple and inlineDave Gordon
2015-12-04Revert "drm/i915: Extend LRC pinning to cover GPU context writeback"Daniel Vetter
2015-12-03drm/i915: Extend LRC pinning to cover GPU context writebackNick Hoath
2015-11-23Merge tag 'v4.4-rc2' into drm-intel-next-queuedDaniel Vetter
2015-11-19Revert "drm/i915: Initialize HWS page address after GPU reset"Arun Siluvery
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä
2015-11-18drm/i915: Wrap context LRI init in a macroVille Syrjälä
2015-11-18drm/i915: Give names to more ring registersVille Syrjälä
2015-11-18drm/i915: Wrap ASSIGN_CTX_{PDP,PM4L} in do {} while(0)Ville Syrjälä
2015-11-18drm/i915: Add wa_ctx_emit_reg()Ville Syrjälä
2015-11-18drm/i915: Add functions to emit register offsets to the ringVille Syrjälä
2015-11-10Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
2015-10-29drm/i915: make A0 wa's applied to A1Tim Gore
2015-10-28drm/i915: Recover all available ringbuffer space following resetChris Wilson
2015-10-21drm/i915: add helpers for platform specific revision id range checksJani Nikula
2015-10-21drm/i915/bxt: add revision id for A1 stepping and use itJani Nikula
2015-10-20Merge tag 'drm-intel-next-2015-10-10' of git://anongit.freedesktop.org/drm-in...Dave Airlie
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