diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch')
| -rw-r--r-- | recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch new file mode 100644 index 0000000..385e1b2 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch @@ -0,0 +1,66 @@ +From ba5f5610841fad3b15c69c6949ed6e19bd5b466e Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Mon, 27 Nov 2023 12:23:27 +0100 +Subject: [PATCH 1/2] arm64: dts: qcom: sm6115: Add UART3 + +Hook up UART3, usually used for communicating with a Bluetooth module. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-1-4bbf266258ef@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git ba5f5610841fad3b15c69c6949ed6e19bd5b466e] +--- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 30 ++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi +index 839c60351240..0d13d7bf6bd1 100644 +--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi +@@ -273,6 +273,25 @@ memory@80000000 { + reg = <0 0x80000000 0 0>; + }; + ++ qup_opp_table: opp-table-qup { ++ compatible = "operating-points-v2"; ++ ++ opp-75000000 { ++ opp-hz = /bits/ 64 <75000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-100000000 { ++ opp-hz = /bits/ 64 <100000000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ ++ opp-128000000 { ++ opp-hz = /bits/ 64 <128000000>; ++ required-opps = <&rpmpd_opp_nom>; ++ }; ++ }; ++ + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>; +@@ -1208,6 +1227,17 @@ spi3: spi@4a8c000 { + status = "disabled"; + }; + ++ uart3: serial@4a8c000 { ++ compatible = "qcom,geni-uart"; ++ reg = <0x0 0x04a8c000 0x0 0x4000>; ++ interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; ++ clock-names = "se"; ++ power-domains = <&rpmpd SM6115_VDDCX>; ++ operating-points-v2 = <&qup_opp_table>; ++ status = "disabled"; ++ }; ++ + i2c4: i2c@4a90000 { + compatible = "qcom,geni-i2c"; + reg = <0x0 0x04a90000 0x0 0x4000>; +-- +2.39.2 + |