1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
|
From ce768160ee1ee9673d60e800389c41b3c707411a Mon Sep 17 00:00:00 2001
From: Richard Henderson <richard.henderson@linaro.org>
Date: Fri, 17 Dec 2021 17:57:15 +0100
Subject: [PATCH 09/21] target/ppc: Update fmadd for new flags
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Now that vximz, vxisi, and vxsnan are computed directly by
softfloat, we don't need to recompute it. This replaces the
separate float{32,64}_maddsub_update_excp functions with a
single float_invalid_op_madd function.
Fix VSX_MADD by passing sfprf to float_invalid_op_madd,
whereas the previous *_maddsub_update_excp assumed it true.
Upstream-Status: Backport
[https://git.qemu.org/?p=qemu.git;a=commit;h=e4052bb773cc829a27786d68caa22f28cff19d39]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-19-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Xiangyu Chen <xiangyu.chen@windriver.com>
---
target/ppc/fpu_helper.c | 46 ++++++++++-------------------------------
1 file changed, 11 insertions(+), 35 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 2ab34236a3..3b1cb25666 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -639,38 +639,15 @@ uint64_t helper_frim(CPUPPCState *env, uint64_t arg)
return do_fri(env, arg, float_round_down);
}
-#define FPU_MADDSUB_UPDATE(NAME, TP) \
-static void NAME(CPUPPCState *env, TP arg1, TP arg2, TP arg3, \
- unsigned int madd_flags, uintptr_t retaddr) \
-{ \
- if (TP##_is_signaling_nan(arg1, &env->fp_status) || \
- TP##_is_signaling_nan(arg2, &env->fp_status) || \
- TP##_is_signaling_nan(arg3, &env->fp_status)) { \
- /* sNaN operation */ \
- float_invalid_op_vxsnan(env, retaddr); \
- } \
- if ((TP##_is_infinity(arg1) && TP##_is_zero(arg2)) || \
- (TP##_is_zero(arg1) && TP##_is_infinity(arg2))) { \
- /* Multiplication of zero by infinity */ \
- float_invalid_op_vximz(env, 1, retaddr); \
- } \
- if ((TP##_is_infinity(arg1) || TP##_is_infinity(arg2)) && \
- TP##_is_infinity(arg3)) { \
- uint8_t aSign, bSign, cSign; \
- \
- aSign = TP##_is_neg(arg1); \
- bSign = TP##_is_neg(arg2); \
- cSign = TP##_is_neg(arg3); \
- if (madd_flags & float_muladd_negate_c) { \
- cSign ^= 1; \
- } \
- if (aSign ^ bSign ^ cSign) { \
- float_invalid_op_vxisi(env, 1, retaddr); \
- } \
- } \
+static void float_invalid_op_madd(CPUPPCState *env, int flags,
+ bool set_fpcc, uintptr_t retaddr)
+{
+ if (flags & float_flag_invalid_imz) {
+ float_invalid_op_vximz(env, set_fpcc, retaddr);
+ } else {
+ float_invalid_op_addsub(env, flags, set_fpcc, retaddr);
+ }
}
-FPU_MADDSUB_UPDATE(float32_maddsub_update_excp, float32)
-FPU_MADDSUB_UPDATE(float64_maddsub_update_excp, float64)
#define FPU_FMADD(op, madd_flags) \
uint64_t helper_##op(CPUPPCState *env, uint64_t arg1, \
@@ -682,8 +659,7 @@ uint64_t helper_##op(CPUPPCState *env, uint64_t arg1, \
flags = get_float_exception_flags(&env->fp_status); \
if (flags) { \
if (flags & float_flag_invalid) { \
- float64_maddsub_update_excp(env, arg1, arg2, arg3, \
- madd_flags, GETPC()); \
+ float_invalid_op_madd(env, flags, 1, GETPC()); \
} \
do_float_check_status(env, GETPC()); \
} \
@@ -2087,8 +2063,8 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, \
env->fp_status.float_exception_flags |= tstat.float_exception_flags; \
\
if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \
- tp##_maddsub_update_excp(env, xa->fld, b->fld, \
- c->fld, maddflgs, GETPC()); \
+ float_invalid_op_madd(env, tstat.float_exception_flags, \
+ sfprf, GETPC()); \
} \
\
if (r2sp) { \
--
2.17.1
|