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Deploy u-boot.elf for Versal devices
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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This patch fixes the u-boot issue in do_install
| DEBUG: Executing shell function do_install
| install: cannot stat
'microzed_zynq7-poky-linux-gnueabi/u-boot/1_2019.01-r0/build/u-boot.elf':
No such file or directory
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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This layer depends on openembedded-layer for xf86 recipe.Make BitBake
throw an warning for situations where an append file (.bbappend) has no
corresponding recipe file
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add generic machines for Zynq and ZU+. These are used to build
sstate-cache and feeds for respective machines
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add microblaze generic machines to build sstate-cache and package feeds
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add initial support for zcu1285 evaluation board which has the
following main features:
* XCZU39DR-FFVF1760
* Samtec BullsEye cable access to:
* 16 GTY transceivers
* 4 GTR transceivers
* 16 ADCs
* 16 DACs
This patch adds machine configuration file for ZCU1285 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL
boot.bin
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Signed-off-by: Swagath Gadde <swagathg@xilinx.com>
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Update kc705-microblazeel to microblaze version v11
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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While enabling PIE does not produce build time errors AFAIC, for
example: bash fails to return/exit properly when PIE is enabled.
Given the fact that init code relies on bash to source scripts at boot
time and such, booting hangs at init on microblaze targets.
Disable PIE on SECURITY_CFLAGS/SECURITY_LDFLAGS for MB architecture
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Introduce FPGA_MNGR_RECONFIG_ENABLE to enable overlay configuration for
fpga-manager support in kernel.
To enable, set FPGA_MNGR_RECONFIG_ENABLE = "1" in local.conf or other
bitbake configuration files.
For backward compatibility, set FPGA_MNGR_RECONFIG_ENABLE based on
IMAGE_FEATURES.
In future release, the option of fpga-manager in IMAGE_FEATURES will be
deprecated.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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CONFIG_REMAKE_ELF is enabled for all zynq boards. Also, using
CONFIG_OF_SEPERATE is recommeneded by u-boot release v2019.01. So,
Deploy u-boot.elf instead of u-boot as u-boot.elf contains dtb. This
would solve the following boot issue:
No valid device tree binary found - please append one to U-Boot binary,
use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d
<file.dtb> initcall sequence 00461b18 failed at call 004582e0 (err=-1)
Signed-off-by: Sreeja Vadakattu <svadakat@xilinx.com>
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Previously the qemu boot mode was 3 which is SD0 which is not present in
the zcu102. boot mode 5 is SD1 with level shifters which zcu102
supports.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add initial support for the zc1275 evaluation board which has the
following main features:
* XCZU29DR-FFVF1760
* Samtec BullsEye cable access to:
* 16 GTY transceivers
* 4 GTR transceivers
* 16 ADCs
* 16 DACs
This patch adds machine configuration file for ZC1275 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL
boot.bin
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add initial support for the zc1254 evaluation board which has the
following main features:
* RFSoC XCZU28DR-FFVE1156
* Samtec BullsEye cable access to:
* 8 high speed analog-to-digital converters (HSADC)
* 8 high speed digital-to-analog converters (HSDAC)
* 8 GTY transceivers
* 4 GTR transceivers
This patch adds machine configuration file for ZC1254 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL
boot.bin
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Build zImage in addition to uImage, this is useful for jtag booting
purpose
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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The Zynq® UltraScale+™ RFSoC ZCU111 Evaluation Kit enables designers to
jumpstart RF-Class analog designs for wireless, cable access,
early-warning(EW)/radar and other high-performance RF applications.
This kit features a Zynq Ultrascale+ RFSoC supporting 8x 4GSPS 12-bit
ADCs, 8x 6.5GSPS 14-bit DAC, and 8 soft-decision forward error
correction (SD-FECs). Complete with ARM Cortex A53 and ARM Cortex-R5
subsystems, UltraScale+ programmable logic, and the highest signal
processing bandwith in a Zynq UltraScale+ device, this kit provides a
rapid, comprehensive RF Analog-to-Digital signal chain protoyping
platform.
This patch adds machine configuration file for ZCU111 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL
boot.bin
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Tested-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Use the updated arch-armv8a tune instead of the old tune file
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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As per the commit f24275598687bcec0252186cb1d9c54b426fef9f, this include
file is no longer required. Remove it from the layer
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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This patch changes QEMU appends to set them weak by default,
this way the user can change them if desired.
Previously this was forcing the parameters for the serial console,
which made it impossible for qemu to use tcp serial ports to read the
output of the serial console
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Images include a uEnv.txt file that is read from U-Boot,
these parameters are read after the default environment
is loaded on U-Boot and just before booting the OS.
Changing anything from the environment through the build
system created a new uEnv file, but this didnt cause the
build system to create a new image (that included the
new file), so changes did not reflect on the image until
a new build was executed.
This patch creates a dependency to u-boot-zynq-uenv:do_deploy
which will cause the image to be recreated when something
from uEnv has changed.
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Set SPL_BINARY with ?= instead of = to allow overwrite for this variable
without using forcevariable. When not using xilinx-bootbin to generate
the boot.bin, this variable should be set to '', to deploy spl boot.bin.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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This include has a single line which adds the virtual/bootloader to
EXTRA_IMAGEDEPENDS. Move this append into the individual machines and
drop the include. This makes using the meta-xilinx-bsp default machine
configuration much simpler for external users as well as making the use
of a bootloader explicit on a per machine basis.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Remove the parsing of KERNEL_DEVICETREE as by default those values will
be populated into the IMAGE_BOOT_FILES variable.
Also add a note describing why wildcard patterns work in the QB_DTB
field.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add all available dtb sources to the IMAGE_BOOT_FILES variable. For
device-tree recipe generated dtbs the files available are only known
after they files are deployed, so a wildcard pattern is used for these
files. Note that this pattern appears before the kernel device trees due
to the preference to use custom non-kernel device trees where available.
This ordering is needed so that recipes like u-boot-zynq-uenv can pick
the first device tree to select as the default.
The kernel device trees are specifically selected based on the value of
KERNEL_DEVICETREE, this avoid the duplication of kernel image type
prefixed files along side having the actual files that the kernel
builds.
Additionally remove all instances of "${MACHINE}.dtb" as they no longer
need to be specified and are incorrect due to the nesting of the files
in the `devicetree` directory.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Replace the definition of IMAGE_BOOT_FILES in machine-xilinx-board.inc
with the use of a function which automatically selects available images
that should be included. This includes the existing implementation of
`get_dtb_list` and replaces it with a function that covers all image
files including the existing default for KERNEL_IMAGETYPE(S) and
UBOOT_BINARY.
Also remove the use of `get_dtb_list` from individual machines which is
replaced by the default value.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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IMAGE_BOOT_FILES
Replaced the hard-coded devicetree files in IMAGE_BOOT_FILES with a function,
which formats the KERNEL_DEVICETREE list properly.
Signed-off-by: Franz Forstmayr <f.forstmayr@gmail.com>
Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add thud as LAYERSERIES_COMPAT
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add tune file supporting versal devices.
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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zynqmpeg and zynqmpev devices has Mali400, overrides extended with
mali400.This patch sets preferred providers to libmali-xlnx.
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Change the microzed board to use the device tree from the kernel. This
device tree was added in in kernel v4.10 and was pulled into the
meta-xilinx layer to resolve some usb issues in commit 8e01359125.
With all kernel recipes being at or beyond v4.10 using the kernel
source is straight forward and removes any issues caused by differences
between the in kernel and the copied version.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Prepend the 'devicetree' subdirectory in IMAGE_BOOT_FILES for machines
that use the device-tree recipe.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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When building pmu firmware using multiconfig setup, the binaries can be
deployed in different build directory. Provide variables to set the
binaries in the required path for QEMU.
Fix SPL dependency on pmu-firmware. Since the pmu-firmware is being built
as a part of multiconfig provide variables to fetch appropriate
pmu-firmware binaries.
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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components
The zynqmp-pmu class was being used to build standalone components (PMU)
for several devices, with the introduction of the meta-xilinx-standalone
layer and the xilinx-standalone distro, this is not necessary anymore.
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Fix the typo in the include file, it is missing require/include
Signed-off-by: Nicholas Pillitteri <njpillitteri@gmail.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add appropriate SOC_VARIANT for each machine configuration. This is
required from the introduction of overrides based on SOC_VARIANT.
Available SOC_VARIANT's for UltraScale+ MPSoC:
"cg" - Zynq UltraScale+ CG Devices
"eg" - Zynq UltraScale+ EG Devices
"ev" - Zynq UltraScale+ EV Devices
Add SOC_VARIANT to zcu102 board. Default variant is EG device.
Add SOC_VARIANT to zcu104 board. Default variant is EV device.
Add SOC_VARIANT to zcu106 board. Default variant is EV device.
Available SOC_VARIANT's for zynq:
"7zs" - Zynq-7000 Single A9 Core
"7z" - Zynq-7000 Dual A9 Core
Add SOC_VARIANT to zc702 board. Default variant is 7z device.
Add SOC_VARIANT to zc706 board.Default variant is 7z device.
Add SOC_VARIANT to microzed board.Default variant is 7z device.
Add SOC_VARIANT to picozed board.Default variant is 7z device.
Add SOC_VARIANT to zedboard board.Default variant is 7z device.
Add SOC_VARIANT to zybo board.Default variant is 7z device.
Add SOC_VARIANT to qemu-zynq7 board.Default variant is 7z device.
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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zynq-7000 devices are mainly shipped in 2 variants.
https://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html#productTable
Available SOC_VARIANT's for zynq:
"7zs" - Zynq-7000 Single A9 Core
"7z" - Zynq-7000 Dual A9 Core
This will extend MACHINEOVERRIDES for each device variant as:
7zs --> zynq7zs
7z --> zynq7z
This patch sets the default value of SOC_VARIANT to 7z. This can be
overriden in machine configuration to match the intended FPGA device.
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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UltraScale MPSoC is shipped in 3 device variants.
https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html#productTable
Available SOC_VARIANT's for zynqmp:
"cg" - Zynq UltraScale+ CG Devices
"eg" - Zynq UltraScale+ EG Devices (MALI 400)
"ev" - Zynq UltraScale+ EV Devices (MALI 400 + VCU)
This will extend MACHINEOVERRIDES for each device variant as:
cg --> zynqmpcg
eg --> zynqmpeg
ev --> zynqmpev
This patch sets the default value of SOC_VARIANT to eg. This can be
overriden in machine configuration to match the intended FPGA device.
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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features
This patch enables to add overrides depending on the SoC capabilities.
UltraScale+ FPGA has different variants of silicon to support different
features like MALI400, VCU. Categorically there are three variants: cg
devices, eg devices(MALI 400) and ev devices (MALI 400+ VCU)
See:
https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html#productTable
dr devices are based for UltraScale+ RFSoC
This patch allows machineoverides to be extended as zynqmp(cg|eg|ev|dr)
and mali400/vcu (based on functionality). This helps in grouping of
settings for similar SoC
This patch also adds packages to be a part of the feed based on
SOC_FAMILY and SOC_VARIANT
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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The ZCU104 Evaluation Kit enables designers to jumpstart designs for
embedded vision applications such as surveillance, Advanced Driver
Assisted Systems (ADAS), machine vision, Augmented Reality (AR), drones
and medical imaging. This kit features a Zynq® UltraScale+™ MPSoC EV
device with video codec and supports many common peripherals and
interfaces for embedded vision use case. The included ZU7EV device is
equipped with a quad-core ARM® Cortex™-A53 applications processor,
dual-core Cortex-R5 real-time processor, Mali™-400 MP2 graphics
processing unit, 4KP60 capable H.264/H.265 video codec, and 16nm FinFET+
programmable logic.
This patch adds machine configuration file for ZCU104 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL
boot.bin
- hwcodec is provided by libomxil-xlnx recipe, this will pull in
additional dependencies of VCU kernel modules, control software,
firmware binaries
Depending on the application need you may want to pass the appropriate
CMA size in bootargs or set CONFIG_CMA_SIZE_MBYTES in kernel.
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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The ZCU106 Evaluation Kit enables designers to jumpstart designs for
video conferencing, surveillance, Advanced Driver Assisted Systems
(ADAS) and streaming and encoding applications. This kit features a
Zynq® UltraScale+™ MPSoC EV device and supports all major peripherals
and interfaces, enabling development for a wide range of applications.
The included ZU7EV device is equipped with a quad-core ARM® Cortex™-A53
applications processor, dual-core Cortex-R5 real-time processor,
Mali™-400 MP2 graphics processing unit, 4KP60 capable H.264/H.265 video
codec, and 16nm FinFET+ programmable logic.
This patch adds machine configuration file for ZCU106 Evaluation Kit
with required setting of board specific yocto variables needed for
compilation of bootloader, kernel and device-tree.
- linux-xlnx is the kernel provider
- u-boot-xlnx is the u-boot provider which will also generate SPL boot.bin
- hwcodec is provided by libomxil-xlnx recipe, this will pull in
additional dependencies of VCU kernel modules, control software,
firmware binaries
Depending on the application need you may want to pass the appropriate
CMA size in bootargs or set CONFIG_CMA_SIZE_MBYTES in kernel.
While using SPL flow, you may need to provide additional hack to pass
the PMU config object. This is similar to all ZU+ boards, due to gap in
SPL flow unable to load PMU config object.
Signed-off-by: Devarsh Thakkar <devarsht@xilinx.com>
Tested-by: Maulik Desai <maulik.desai@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Add LAYERSERIES_COMPAT for sumo release
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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kc705 is tested with Xilinx kernel tree and u-boot, set preferred
provider to use the vendor tree rather than upstream version
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Due to changes in 1138c5623d3e0c415d18b109ccf6c4f301c173f6, the
definiton of UBOOT_MACHINE was removed. This causes the following error
ERROR: Nothing PROVIDES 'virtual/bootloader'
u-boot-xlnx PROVIDES virtual/bootloader but was skipped: Either
UBOOT_MACHINE or UBOOT_CONFIG must be set in the kc705-microblazeel
machine configuration.
u-boot PROVIDES virtual/bootloader but was skipped: Either UBOOT_MACHINE
or UBOOT_CONFIG must be set in the kc705-microblazeel machine
configuration.
u-boot-xlnx-dev PROVIDES virtual/bootloader but was skipped: Either
UBOOT_MACHINE or UBOOT_CONFIG must be set in the kc705-microblazeel
machine configuration.
This is a requried setting, set it to microblaze-generic_config
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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Use ATF and u-boot.elf while booting using QEMU instead of
u-boot-spl.bin. The ATF code is fixed not to fail while looking for
FSBL. Also adopt to using pmu-firmware-${MACHINE} name change
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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The MicroBlaze tunes are now part of oe-core. This removes the need for
the meta-xilinx-bsp layer to provide architecture tunes.
The tunes in oe-core are almost identical (with the exception of
tune-microblaze.inc which had machine configuration in meta-xilinx).
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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With the perspective removal of tune-microblaze.inc, the following
preferred GDB version configuration for MicroBlaze needs to be
relocated.
This change also drops the setting of gdb-cross* targets as they were
not setup properly since "gdb-cross-${TARGET_ARCH}" was not specified
correctly. This is also preferred as newer GDB (e.g. 8.0) does support
gdb-cross for debugging (just not gdbserver/gdb).
Ideally the MicroBlaze GDB patches should be updated to support the
newest GDB and or upstreamed. However this setup continues to be
available until that occurs.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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The tune-microblaze.inc is currently providing this configuration,
however since this is not a tune specific configuration it should be set
by the machine itself. Additionally with the perspective change to
remove tune-microblaze.inc the reliance on this includes configuration
needs to be removed.
Also remove the superfluous '_remove = "device-tree"' for
s3adsp1800-qemu-microblazeeb.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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With prelink-rtld support available for MicroBlaze and toolchain fixes
for atomic CAS bugs it is functional to generate gobject introspection
data for MicroBlaze binaries. This does still require the meta-xilinx
append for qemu which enables the architecture such that qemu linux user
is available.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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As discussed previously on mailing list, we are proceeding with layer
restructuring. For rocko release we will have the following layers
meta-xilinx
->meta-xilinx-bsp (current meta-xilinx)
->meta-xilinx-contrib
In the subsequent releases we will add other layers from Xilinx
meta-xilinx
->meta-xilinx-bsp (current meta-xilinx)
->meta-petalinux
->meta-xilinx-tools
->meta-xilinx-contrib
This will provide one clone to get all the required meta layers from
Xilinx for a complete solution, and the users can blacklist any layer
which they don't want to use using bblayer.conf.
This will enables us to help our vendors/partners to add their reference
designs, board definitions etc.
Recipe changes :
* Move reference design zybo-linux-bd.bb to meta-xilinx-contrib
* Move kernel patches realted to zybo-linux-bd-zynq7 board to
meta-xilinx-contrib
* Update README
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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