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The board name for J721E EdgeAI Kit (EAIK) is changed to J721E SK [1],
so replace the eaik dtb with sk dtb file
[1] https://www.ti.com/tool/SK-TDA4VM
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@konsulko.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
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J721E EdgeAI Kit (EAIK) is a low cost, small form factor board designed
for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display,
GPU, dedicated safety island and security accelerators.
J721E EAIK supports the following interfaces:
* 4 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.0 Type-C port
* x3 USB 3.0 Type-A ports
* x1 PCIe M.2 E Key
* x1 PCIe M.2 M Key
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi compatible GPIO header
J721e EVM and EAIK uses the unified bootloader. Add j721e eaik dtb
for machine=j721e-evm
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
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commit 8b206b32ec18 ("conf: j7-evm: Remove unavailable dtb/o from 5.10 kernel")
removed all non-existent dtb* for j7-evm as they were not
available on linux 5.10 branch at that time.
This patch reintroduces k3-j721e-common-proc-board-infotainment.dtbo overlay.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
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The following dtb/o are not currently available in
ti-linux-5.10.y branch.
Removing for now, and shall be added back once they are
available in 5.10 kernel.
- ti/k3-j721e-proc-board-tps65917.dtb
- ti/k3-j721e-common-proc-board-infotainment.dtbo
- ti/k3-j721e-pcie-backplane.dtbo
- ti/k3-j721e-common-proc-board-jailhouse.dtbo
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Latest upstream jailhouse uses ttyS3 as console.
Update the conf file so that this reflects correctly in the
tiny rootfs.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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* ti/k3-j721e-common-proc-board-infotainment-display-sharing.dtbo
* ti/k3-j721e-common-proc-board-jailhouse.dtbo
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Tinku Mannan <tmannan@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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There is no mpu2_1,mpu3_0,mpu3_1 for j7-evm. They should have been
mcu2_1,mcu3_0 and mcu3_1 respectively.
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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override kickstarter files
Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Mahesh Radhakrishnan <m-radhakrishnan2@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
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