| Age | Commit message (Collapse) | Author |
|---|
|
Update machine and meta branch to use latest SRCREV.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Acked-By: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
Remove typo in MAINTAINERS file for haswell-wc bsp.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
Provide kernel v3.8 and v3.10 recipe for haswell-wc BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
Provide a formfactor configuration for the haswell-wc BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
Create a new machine named 'haswell-wc'.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
This layer provides support for 4th Gen Intel® Core™ Processor with
Mobile Intel QM87 and HM86 Chipsets.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
This creates meta-intel/meta-isg, a dedicated area within meta-intel
for ISG to house and maintain their ISG-specific BSPs.
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
Ong Boon Leong
Tom Zanussi