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From f18b2e297dc69b3fdc3c4b6a76512b0a584ccc8f Mon Sep 17 00:00:00 2001
From: Eric Bernstein <eric.bernstein@amd.com>
Date: Mon, 10 Sep 2018 10:11:01 -0400
Subject: [PATCH 5431/5725] drm/amd/display: Stereo 3D support in VSC
[Why]
Need to add strere 3D information in VSC
[How]
Update mod_build_vsc_infopacket with stereo info
Change-Id: Ie99f9f3259e10dcf37a92192cd08e2a65299cf9d
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
---
.../amd/display/modules/info_packet/info_packet.c | 58 ++++++++++++++++++++--
1 file changed, 54 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
index 52378fc..ff8bfb9 100644
--- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
+++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
@@ -48,9 +48,12 @@ static void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
unsigned int i;
unsigned int pixelEncoding = 0;
unsigned int colorimetryFormat = 0;
+ bool stereo3dSupport = false;
- if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE)
+ if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
vscPacketRevision = 1;
+ stereo3dSupport = true;
+ }
/*VSC packet set to 2 when DP revision >= 1.2*/
if (stream->psr_version != 0)
@@ -94,12 +97,59 @@ static void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only
info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h).
- if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_INBAND_FA)
- info_packet->sb[0] = 0x1;
-
info_packet->valid = true;
}
+ if (stereo3dSupport) {
+ /* ==============================================================================================================|
+ * A. STEREO 3D
+ * ==============================================================================================================|
+ * VSC Payload (1 byte) From DP1.2 spec
+ *
+ * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter)
+ * -----------------------------------------------------------------------------------------------------
+ * 0 = Non Stereo Video | Must be set to 0x0
+ * -----------------------------------------------------------------------------------------------------
+ * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1
+ * | 0x1: Right when Stereo Signal = 1
+ * | 0x2: Left when Stereo Signal = 1
+ * | (others reserved)
+ * -----------------------------------------------------------------------------------------------------
+ * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom
+ * | (others reserved)
+ * -----------------------------------------------------------------------------------------------------
+ * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines
+ * | 0x1: horiz interleaved, right view pixels on odd lines
+ * | 0x2: checker board, start with left view pixel
+ * | 0x3: vertical interleaved, start with left view pixels
+ * | 0x4: vertical interleaved, start with right view pixels
+ * | (others reserved)
+ * -----------------------------------------------------------------------------------------------------
+ * 4 = Side-by-side | 0x0: left half represents left eye view
+ * | 0x1: left half represents right eye view
+ */
+ switch (stream->timing.timing_3d_format) {
+ case TIMING_3D_FORMAT_HW_FRAME_PACKING:
+ case TIMING_3D_FORMAT_SW_FRAME_PACKING:
+ case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
+ case TIMING_3D_FORMAT_TB_SW_PACKED:
+ info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom.
+ break;
+ case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA:
+ case TIMING_3D_FORMAT_INBAND_FA:
+ info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1
+ break;
+ case TIMING_3D_FORMAT_SIDE_BY_SIDE:
+ case TIMING_3D_FORMAT_SBS_SW_PACKED:
+ info_packet->sb[0] = 0x04; // Side-by-side
+ break;
+ default:
+ info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0.
+ break;
+ }
+
+ }
+
/* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication.
* Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry
* format to the DP Sink device with VSC SDP only when the DP Sink device supports it
--
2.7.4
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