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From dc65c62bca59f40097977adf55b0cc08636bc343 Mon Sep 17 00:00:00 2001
From: Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Date: Thu, 21 Sep 2023 11:34:50 +0530
Subject: [PATCH 20/31] amd-xgbe: v2 add support for ethernet LEDs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add support to xgbe driver to indicate Link speed &
Link activity to provide valuable information to
end-user based on Ethernet port activity.
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Change-Id: Id798a1fcbf4b0e936565c3735fa606e4da9e38b2
---
drivers/net/ethernet/amd/xgbe/xgbe-common.h | 4 +
drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 2 +
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 129 +++++++++++++++++++-
drivers/net/ethernet/amd/xgbe/xgbe.h | 3 +
4 files changed, 137 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
index 52276ff768e1..3788cf97ed40 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
@@ -1092,6 +1092,10 @@
#define XP_PROP_4_REDRV_MODEL_WIDTH 3
#define XP_PROP_4_REDRV_PRESENT_INDEX 31
#define XP_PROP_4_REDRV_PRESENT_WIDTH 1
+#define XP_PROP_5_REG_0_INDEX 0
+#define XP_PROP_5_REG_0_WIDTH 8
+#define XP_PROP_5_REG_1_INDEX 8
+#define XP_PROP_5_REG_1_WIDTH 8
/* I2C Control register offsets */
#define IC_CON 0x0000
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
index 37d4e80f012e..b0eaa933f00b 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c
@@ -351,12 +351,14 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
+ pdata->pp5 = XP_IOREAD(pdata, XP_PROP_5);
if (netif_msg_probe(pdata)) {
dev_dbg(dev, "port property 0 = %#010x\n", pdata->pp0);
dev_dbg(dev, "port property 1 = %#010x\n", pdata->pp1);
dev_dbg(dev, "port property 2 = %#010x\n", pdata->pp2);
dev_dbg(dev, "port property 3 = %#010x\n", pdata->pp3);
dev_dbg(dev, "port property 4 = %#010x\n", pdata->pp4);
+ dev_dbg(dev, "port property 5 = %#010x\n", pdata->pp5);
}
/* Set the maximum channels and queues */
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
index 2fe7b93fe0ac..f429f461618c 100755
--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
@@ -393,6 +393,109 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
enum xgbe_mb_cmd cmd,
enum xgbe_mb_subcmd sub_cmd);
+u32 gpio_offset[2][2] = {};
+#define LINK_STATUS_CHANGED(pdata, link_status) \
+ ((pdata)->phy.link != (link_status))
+/* Bit Operation */
+#define SET_BIT(data, idx) ((data) |= 1 << (idx))
+#define CLR_BIT(data, idx) ((data) &= ~(1 << (idx)))
+#define CHNG_BIT(data, idx) ((data) ^= (1 << (idx)))
+
+#define GPIO_BASE_PHY_ADDR_LOW 0xFED81500
+#define GPIO_BASE_PHY_ADDR_HIGH 0x0
+#define GPIO_MAPPING_SIZE 0x800
+#define GPIO_OUTPUTVAL 22
+
+
+enum led_action {
+ LED_ACT_OFF,
+ LED_ACT_ON,
+ LED_ACT_TOGGLE,
+};
+
+enum led_status {
+ LED_SPEED,
+ LED_ACTIVITY,
+};
+
+static int gpio_action(struct xgbe_prv_data *pdata, int speed_activity,
+ enum led_action action)
+{
+ struct xgbe_phy_data *phy_data = pdata->phy_data;
+ u32 reg, ofst;
+
+ if (!pdata->gpio_virt_addr) {
+ u32 base_addr_lo = GPIO_BASE_PHY_ADDR_LOW;
+ u32 base_addr_hi = GPIO_BASE_PHY_ADDR_HIGH;
+ u64 gpio_phys_addr = ((u64)base_addr_hi << 32 | base_addr_lo);
+
+ pdata->gpio_virt_addr = devm_ioremap(pdata->dev, gpio_phys_addr,
+ GPIO_MAPPING_SIZE);
+ if (!pdata->gpio_virt_addr)
+ return -ENOMEM;
+ }
+
+ ofst = gpio_offset[phy_data->port_id][speed_activity];
+ reg = ioread32(pdata->gpio_virt_addr + ofst);
+
+ switch (action) {
+ case LED_ACT_ON:
+ SET_BIT(reg, GPIO_OUTPUTVAL);
+ break;
+ case LED_ACT_OFF:
+ CLR_BIT(reg, GPIO_OUTPUTVAL);
+ break;
+ case LED_ACT_TOGGLE:
+ CHNG_BIT(reg, GPIO_OUTPUTVAL);
+ break;
+ default:
+ break;
+ }
+ iowrite32(reg, pdata->gpio_virt_addr + ofst);
+ return 0;
+}
+
+static void tx_rx_activity_check(struct xgbe_prv_data *pdata)
+{
+ struct xgbe_mmc_stats *stats = &pdata->mmc_stats;
+ u64 tx_pkts, rx_pkts;
+
+ tx_pkts = XGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_LO);
+ tx_pkts |= ((u64)XGMAC_IOREAD(pdata,MMC_TXFRAMECOUNT_GB_HI) << 32);
+ tx_pkts ? stats->txframecount_gb += tx_pkts : 0;
+
+ rx_pkts = XGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_LO);
+ rx_pkts |= ((u64)XGMAC_IOREAD(pdata,MMC_RXFRAMECOUNT_GB_HI) << 32);
+ rx_pkts ? stats->rxframecount_gb += rx_pkts : 0;
+
+ if (tx_pkts || rx_pkts)
+ gpio_action(pdata, LED_ACTIVITY, LED_ACT_TOGGLE);
+ else
+ gpio_action(pdata, LED_ACTIVITY, LED_ACT_ON);
+}
+
+static int handle_gpio_led(struct xgbe_prv_data *pdata, int link_status)
+{
+ if (!pdata->gpio_enabled)
+ return 1;
+
+ if (LINK_STATUS_CHANGED(pdata, link_status)) {
+ if (!link_status) {
+ gpio_action(pdata, LED_SPEED, LED_ACT_OFF);
+ gpio_action(pdata, LED_ACTIVITY, LED_ACT_OFF);
+ return 0;
+ }
+ gpio_action(pdata, LED_ACTIVITY, LED_ACT_ON);
+ }
+
+ if (link_status) {
+ if (pdata->phy.speed == SPEED_10000)
+ gpio_action(pdata, LED_SPEED, LED_ACT_ON);
+ tx_rx_activity_check(pdata);
+ }
+ return 0;
+}
+
static int xgbe_phy_i2c_xfer(struct xgbe_prv_data *pdata,
struct xgbe_i2c_op *i2c_op)
{
@@ -2870,7 +2973,7 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
}
}
-static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
+static int xgbe_get_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int reg;
@@ -2956,6 +3059,15 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
return 0;
}
+static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
+{
+ int link_status;
+
+ link_status = xgbe_get_phy_link_status(pdata, an_restart);
+ handle_gpio_led(pdata, link_status);
+ return link_status;
+}
+
static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
@@ -3363,6 +3475,10 @@ static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
+ if (pdata->gpio_enabled) {
+ gpio_action(pdata, LED_ACTIVITY, LED_ACT_OFF);
+ gpio_action(pdata, LED_SPEED, LED_ACT_OFF);
+ }
/* If we have an external PHY, free it */
xgbe_phy_free_phy_device(pdata);
@@ -3465,6 +3581,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)
struct ethtool_link_ksettings *lks = &pdata->phy.lks;
struct xgbe_phy_data *phy_data;
struct mii_bus *mii;
+ u8 gpio_reg[2];
int ret;
/* Check if enabled */
@@ -3509,6 +3626,16 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)
dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model);
}
+ gpio_reg[0] = XP_GET_BITS(pdata->pp5, XP_PROP_5, REG_0);
+ gpio_reg[1] = XP_GET_BITS(pdata->pp5, XP_PROP_5, REG_1);
+ dev_dbg(pdata->dev, "GPIO INFO: reg0 %x, reg1 %x\n", gpio_reg[0], gpio_reg[1]);
+
+ if (gpio_reg[0] && gpio_reg[1]) {
+ pdata->gpio_enabled = 1;
+ gpio_offset[phy_data->port_id][0] = 4 * gpio_reg[0];
+ gpio_offset[phy_data->port_id][1] = 4 * gpio_reg[1];
+ }
+
/* Validate the connection requested */
if (xgbe_phy_conn_type_mismatch(pdata)) {
dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n",
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
index 4ce8cfe3f14e..358061c4417f 100755
--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
@@ -1082,6 +1082,7 @@ struct xgbe_prv_data {
void __iomem *sir1_regs; /* SerDes integration registers (2/2) */
void __iomem *xprop_regs; /* XGBE property registers */
void __iomem *xi2c_regs; /* XGBE I2C CSRs */
+ void __iomem *gpio_virt_addr;
/* Port property registers */
unsigned int pp0;
@@ -1089,6 +1090,7 @@ struct xgbe_prv_data {
unsigned int pp2;
unsigned int pp3;
unsigned int pp4;
+ unsigned int pp5;
/* Overall device lock */
spinlock_t lock;
@@ -1329,6 +1331,7 @@ struct xgbe_prv_data {
bool debugfs_an_cdr_workaround;
bool debugfs_an_cdr_track_early;
bool en_rx_adap;
+ bool gpio_enabled;
int rx_adapt_retries;
bool rx_adapt_done;
bool mode_set;
--
2.34.1
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