diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4807-drm-amd-pp-Rename-enable_per_cu_power_gating-to-powe.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4807-drm-amd-pp-Rename-enable_per_cu_power_gating-to-powe.patch | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4807-drm-amd-pp-Rename-enable_per_cu_power_gating-to-powe.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4807-drm-amd-pp-Rename-enable_per_cu_power_gating-to-powe.patch new file mode 100644 index 00000000..b417f7dc --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4807-drm-amd-pp-Rename-enable_per_cu_power_gating-to-powe.patch @@ -0,0 +1,94 @@ +From 11a48aee0e77a68bc26279855ec3693042768576 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 5 Jun 2018 11:28:03 +0800 +Subject: [PATCH 4807/5725] drm/amd/pp: Rename enable_per_cu_power_gating to + powergate_gfx + +keep consistent with powergate_uvd/vce/mmhub + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 +++--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h | 2 +- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 +- + 5 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 9732ae9..f9baa04 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -246,13 +246,13 @@ static int pp_set_powergating_state(void *handle, + pr_err("gfx off control failed!\n"); + } + +- if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) { +- pr_debug("%s was not implemented.\n", __func__); ++ if (hwmgr->hwmgr_func->powergate_gfx == NULL) { ++ pr_info("%s was not implemented.\n", __func__); + return 0; + } + + /* Enable/disable GFX per cu powergating through SMU */ +- return hwmgr->hwmgr_func->enable_per_cu_power_gating(hwmgr, ++ return hwmgr->hwmgr_func->powergate_gfx(hwmgr, + state == AMD_PG_STATE_GATE); + } + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c +index a77cced..11d71f1 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c +@@ -417,7 +417,7 @@ int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, + * Powerplay will only control the static per CU Power Gating. + * Dynamic per CU Power Gating will be done in gfx. + */ +-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable) ++int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable) + { + struct amdgpu_device *adev = hwmgr->adev; + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h +index be7f66d..fc8f8a6 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h +@@ -33,6 +33,6 @@ int smu7_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate); + int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr); + int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, + const uint32_t *msg_id); +-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable); ++int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable); + + #endif +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index 2d83afe..bb3f80c 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -5044,7 +5044,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = { + .get_fan_control_mode = smu7_get_fan_control_mode, + .force_clock_level = smu7_force_clock_level, + .print_clock_levels = smu7_print_clock_levels, +- .enable_per_cu_power_gating = smu7_enable_per_cu_power_gating, ++ .powergate_gfx = smu7_powergate_gfx, + .get_sclk_od = smu7_get_sclk_od, + .set_sclk_od = smu7_set_sclk_od, + .get_mclk_od = smu7_get_mclk_od, +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index 9b07d6e..95e29a2 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -302,7 +302,7 @@ struct pp_hwmgr_func { + int (*power_off_asic)(struct pp_hwmgr *hwmgr); + int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask); + int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf); +- int (*enable_per_cu_power_gating)(struct pp_hwmgr *hwmgr, bool enable); ++ int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable); + int (*get_sclk_od)(struct pp_hwmgr *hwmgr); + int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); + int (*get_mclk_od)(struct pp_hwmgr *hwmgr); +-- +2.7.4 + |