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commit bd2d6642ce2aef47308ebb8544d744adca12402e from
git@git.assembla.com:cavium/WindRiver.linux.git
Since now there will always be only one segment in CQE_RX, cleaned
up NAPI handlers etc to get rid of unnecessary multisegment handling
logic. Also added structs for full CQE_RX and CQE_TX to avoid junk
subdescriptor accessing logic.
Other changes done
- It's been observed that ocassionally HW is doing a partial CQE
write (16byte) due to which cqe_hdr->cqe_type is valid but rest
of the descriptor is stale. This is resulting in buffer double free
issues. Hence along with cqe_type check sg->subdc also to determine
if a CQE is valid or not. No changes needed for CQE_TX as full CQE_TX
is within 16 bytes.
- Adjusted RQ's Aura backpressure level for better performance with
higher queue counts (> 12). There still a 10% gap between flowcontrol
enable and disable for 24queues. Upto 12queues it is negligible.
- Removed lockless transmit capability which at times resulting in
wrong accounting of BQL limits.
Change-Id: Id8d9be44a58ad808cd5228900649c36d79efd05c
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/21012
Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
(cherry picked from commit d0777e85e52cf9d80971e2e7c315cc9a6c62b9c1)
Reviewed-on: https://sj1git1.cavium.com/21043
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
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commit d8b974f75f1722a2d0c1d4a6bb773010b609ddf5 from
git@git.assembla.com:cavium/WindRiver.linux.git
RQ's RED and DROP pkt interrupt's handling has been removed
in earlier patches but missed unregistering the irqs. This
patch removes enabling these interrupts in RQ's context.
Also added more debug info to CQ and SQ error interrupts.
Change-Id: I54d0c31475fa9acbf9674c574f2876571a938ddd
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/13232
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Reviewed-on: https://sj1git1.cavium.com/13444
Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit bc38c924eed0538e6db34192bfbfc2936e19f7c2 from
git@git.assembla.com:cavium/WindRiver.linux.git
This patch adds PTP clock and uses it in OcteonTX2 network device.
PTP clock uses mbox calls to access the hardware counter
on the RVU side.
Change-Id: I998507730560859349a0ef981113971cf37b5037
Signed-off-by: Aleksey Makarov <amakarov@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit 434c26ce8c92928f7cbec45b0176652e7c35c249 from
git@git.assembla.com:cavium/WindRiver.linux.git
Queue interrupts communicate errors from completion, receive and send
queues to the driver. This patch supports them. In the case of error
it just reinitializes the driver.
There exist 64 queue interrupts.
All errors from completion, send and receive queues are reported to
the queue interrupt 0;
Change-Id: Iab0c14c49f21b74f4032509dd7bfcbac719873eb
Signed-off-by: Aleksey Makarov <amakarov@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit f9f92d098ffa3cf751a83641b426768eef7861b7 from
git@git.assembla.com:cavium/WindRiver.linux.git
This patch adds support for TCP segmentation offload.
Maximum number of segments HW supports is 255.
Change-Id: I52bab208cf5433314d37ba527f193d6d9deafd32
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit df19843ba2b3b87cf1a871f58e53eb71d3affa38 from
git@git.assembla.com:cavium/WindRiver.linux.git
Added support for offloading ingress packet's checksum
verification and egress packets's checksum calculation.
Change-Id: I833be25ec0054dd0e45d51f1c24c941d25ad472e
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit f168f03979afe502d07a86ab2b4021e2c35feb44 from
git@git.assembla.com:cavium/WindRiver.linux.git
This patch adds support for packet transmission and also
for processing transmitted packet notifications.
One SQE can fit a max of 9 fragments, if SKB has
more number of fragments then SKB is linearized.
Change-Id: I915dbd4c5a48d994deff165ca919d2808701b0fb
Co-developed-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
[Xiaotao: change struct name due to commit
8842d285bafa ("net: Convert skb_frag_t to bio_vec")]
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit 227338a9e6adfdae68f4d052cf0ce0f328f643d1 from
git@git.assembla.com:cavium/WindRiver.linux.git
This patch adds support for processing CQE_RX queued for
a received packet, prepares an skb and handovers to stack.
Also refill receive buffers into NPA pool.
Change-Id: I267ed6a8896590c9378a4374ab1a36538f735cc2
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit c7d986cc171bf4e27c3a5b5ffc411390810cdc9d from
git@git.assembla.com:cavium/WindRiver.linux.git
This patch enables CQ IRQs (i.e CINTs), registers handlers
and also adds NAPI poll handlers for each of the CQ.
Each of RQ and SQ are mapped to a different CQ to avoid
issues related to CQE limits set for ingress and egress
packets. But these CQs are mapped to same CINT, so that
same CPU processes CQE_RX and CQE_TX, for eg RQ0's CQ
and SQ0's CQ are mapped to CINT0 i.e CPU0.
CQE processing support is not added in this patch.
Change-Id: I42364e98a8437779eee409693d40fb54c96c3302
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Linu Cherian <lcherian@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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commit b5e0c7543ff91c14a48d8da907e2f898254456fe from
git@git.assembla.com:cavium/WindRiver.linux.git
Request admin function (RVU AF) to allocate memory for NPA aura/pool
and NIX RQ/SQ/CQ HW contexts. Upon receiving response, save
some of the HW constants like number of pointers per stack page,
size of send queue buffer (where SQEs are queued by HW) e.t.c
which are later used to initialize queues.
Change-Id: Id3e46256f1016146c7cd71737d043aae16954242
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
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Sunil Goutham
Aleksey Makarov