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path: root/drivers/mmc/host/sdhci-pci-o2micro.c
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2020-08-19mmc: sdhci-pci-o2micro: Bug fix for O2 host controller Seabird1shirley her
[ Upstream commit cdd2b769789ae1a030e1a26f6c37c5833cabcb34 ] To fix support for the O2 host controller Seabird1, set the quirk SDHCI_QUIRK2_PRESET_VALUE_BROKEN and the capability bit MMC_CAP2_NO_SDIO. Moreover, assign the ->get_cd() callback. Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Link: https://lore.kernel.org/r/20200721011733.8416-1-shirley.her@bayhubtech.com [Ulf: Updated the commit message] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-09-11Merge branch 'fixes' into nextUlf Hansson
2019-09-11mmc: sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock phase shift issueShirley Her (SC)
Fix data read/write error in HS200 mode due to chip DLL lock phase shift Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11mmc: sdhci-pci-o2micro: Move functions in preparation to fix DLL lock phase ↵Shirley Her (SC)
shift issue Move functions in preparation to fix DLL lock phase shift issue Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11mmc: sdhci-pci-o2micro: Change O2 Host PLL and DLL register nameShirley Her (SC)
Change O2 Host PLL and DLL register name Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11Revert "mmc: sdhci: Remove unneeded quirk2 flag of O2 SD host controller"Daniel Drake
This reverts commit 414126f9e5abf1973c661d24229543a9458fa8ce. This commit broke eMMC storage access on a new consumer MiniPC based on AMD SoC, which has eMMC connected to: 02:00.0 SD Host controller: O2 Micro, Inc. Device 8620 (rev 01) (prog-if 01) Subsystem: O2 Micro, Inc. Device 0002 During probe, several errors are seen including: mmc1: Got data interrupt 0x02000000 even though no data operation was in progress. mmc1: Timeout waiting for hardware interrupt. mmc1: error -110 whilst initialising MMC card Reverting this commit allows the eMMC storage to be detected & usable again. Signed-off-by: Daniel Drake <drake@endlessm.com> Fixes: 414126f9e5ab ("mmc: sdhci: Remove unneeded quirk2 flag of O2 SD host controller") Cc: stable@vger.kernel.org # v5.1+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-18mmc: sdhci: sdhci-pci-o2micro: Check if controller supports 8-bit widthRaul E Rangel
The O2 controller supports 8-bit EMMC access. JESD84-B51 section A.6.3.a defines the bus testing procedure that `mmc_select_bus_width()` implements. This is used to determine the actual bus width of the eMMC. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-18mmc: sdhci: sdhci-pci-o2micro: Correctly set bus width when tuningRaul E Rangel
The O2Micro controller only supports tuning at 4-bits. So the host driver needs to change the bus width while tuning and then set it back when done. There was a bug in the original implementation in that mmc->ios.bus_width also wasn't updated. Thus setting the incorrect blocksize in sdhci_send_tuning which results in a tuning failure. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Fixes: 0086fc217d5d7 ("mmc: sdhci: Add support for O2 hardware tuning") Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner
Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-25mmc: sdhci: Remove unneeded quirk2 flag of O2 SD host controllerErnest Zhang(WH)
O2 SD host controller only need set the quirk2 flag SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD when work on force 1.8v emmc mode but not normal mode Signed-off-by: Ernest Zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-02-25mmc: sdhci: Fix O2 Host PLL and card detect issueErnest Zhang(WH)
1. O2 Host Controller PLL lock status is not in compliance with CLOCK_CONTROL register bit 1 2. O2 Host Controller card detect function only work when PLL is enabled and locked Signed-off-by: Ernest Zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-02-25mmc: sdhci: Moving sdhci_o2 into sdhci-pci-o2micro.cErnest Zhang(WH)
Moving sdhci_o2 into sdhci-pci-o2micro.c Signed-off-by: Ernest Zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: sdhci-pci-o2micro: Add quirk for O2 Micro dev 0x8620 rev 0x01Yu Zhao
This device reports SDHCI_CLOCK_INT_STABLE even though it's not ready to take SDHCI_CLOCK_CARD_EN. The symptom is that reading SDHCI_CLOCK_CONTROL after enabling the clock shows absence of the bit from the register (e.g. expecting 0x0000fa07 = 0x0000fa03 | SDHCI_CLOCK_CARD_EN but only observed the first operand). mmc1: Timeout waiting for hardware cmd interrupt. mmc1: sdhci: ============ SDHCI REGISTER DUMP =========== mmc1: sdhci: Sys addr: 0x00000000 | Version: 0x00000603 mmc1: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000 mmc1: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000 mmc1: sdhci: Present: 0x01ff0001 | Host ctl: 0x00000001 mmc1: sdhci: Power: 0x0000000f | Blk gap: 0x00000000 mmc1: sdhci: Wake-up: 0x00000000 | Clock: 0x0000fa03 mmc1: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000 mmc1: sdhci: Int enab: 0x00ff0083 | Sig enab: 0x00ff0083 mmc1: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000 mmc1: sdhci: Caps: 0x25fcc8bf | Caps_1: 0x00002077 mmc1: sdhci: Cmd: 0x00000000 | Max curr: 0x005800c8 mmc1: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000 mmc1: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000 mmc1: sdhci: Host ctl2: 0x00000008 mmc1: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x00000000 mmc1: sdhci: ============================================ The problem happens during wakeup from S3. Adding a delay quirk after power up reliably fixes the problem. Signed-off-by: Yu Zhao <yuzhao@google.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-30mmc: sdhci: Add MSI interrupt support for O2 SD hosternest.zhang
Add MSI interrupt support if the SD host device can support MSI interrupt. Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-30mmc: sdhci: Add support for O2 hardware tuningernest.zhang
Add hardware tuning function instead of software tuning because O2/Bayhub SD host controller support hardware tuning. Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-30mmc: sdhci: Change O2 Host HS200 mode clock frequency to 200MHzernest.zhang
O2 SD Host HS200 mode clock frequency current is 208MHz, should be changed to 200MHz to meet specification. Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-30mmc: sdhci: Add support for O2 eMMC HS200 modeernest.zhang
When use eMMC as boot device, the eMMC signaling voltage is tied to 1.8v fixed output voltage, bios can set o2 sd host controller PCI configuration register 0x308 bit4 to 1 to let driver skip 3.3v signaling voltage and direct use 1.8v singling voltage in eMMC initialize process. Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-30mmc: sdhci-pci: Tidy o2micro definitionsAdrian Hunter
We keep PCI Ids in sdhci-pci.h and the O2-specific definitions belong in sdhci-pci-o2micro.c. Move those definitions accordingly. Remove unused O2 definitions in sdhci-pci-core.c. The 3 o2micro external function declarations might as well be in sdhci-pci.h as well, so move them there and get rid of sdhci-pci-o2micro.h entirely. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-pci: Let suspend/resume callbacks replace default callbacksAdrian Hunter
The suspend / resume callbacks lack the flexibility to allow a device to specify a different function entirely. Change them around so that device functions are called directly and they in turn can call the default implementations if needed. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Conditionally compile pm sleep functionsAdrian Hunter
It is confusing to have some parts of suspend / resume under conditional compilation and some parts not. Use conditional compilation everywhere. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2015-10-26mmc: sdhci-pci: Make sdhci_pci_o2_fujin2_pci_init() staticBen Hutchings
It has no external callers. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-26mmc: sdhci-pci: Build o2micro support in the same moduleBen Hutchings
sdhci-pci-o2micro.c contains no initialisation and its functions are only called from shdci-pci.c, so there is no reason for it to be a separate module, let alone or for it to always be built-in. - Rename sdhci-pci.c to sdhci-pci-core.c so that the sdhci-pci module can be built from multiple source files - Add sdhci-pci-o2micro.c to it - Remove redundant exports Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pci-o2micro: Fix Dell E5440 issuePeter Guo
Fix Dell E5440 when reboot Linux, can't find o2micro sd host chip issue. Fixes: 01acf6917aed (mmc: sdhci-pci: add support of O2Micro/BayHubTech SD hosts) Signed-off-by: Peter Guo <peter.guo@bayhubtech.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-05-22mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 supportPeter Guo
Add O2Micro/BayHubTech chip 8520 subversion B1 SD3.0 support. Add O2Micro/BayHubTech chip 8620 and 8621 SD3.0 support Enable Led function of 8520 chip. Signed-off-by: Peter Guo <peter.guo@bayhubtech.com> Signed-off-by: Adam Lee <adam.lee@canonical.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-01-13mmc: sdhci-pci: add support of O2Micro/BayHubTech SD hostsAdam Lee
Add O2Micro/BayHubTech SD Host DeviceId 8520 support. Add O2Micro/BayHubTech SD Host DeviceId 8420 & 8421 support. Add O2Micro/BayHubTech SD Host DeviceId 8620 & 8621 support. These card readers are used in laptops like Lenovo ThinkPad W540, Dell Latitude E5440, Dell Latitude E6540. Signed-off-by: Peter Guo <peter.guo@bayhubtech.com> Signed-off-by: Adam Lee <adam.lee@canonical.com> Signed-off-by: Chris Ball <chris@printf.net>
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