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git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core Frameworks:
- Add support for a "resource managed strongly uncachable ioremap"
call
- Provide a collection of MFD helper macros
- Remove mfd_clone_cell() from MFD core
- Add NULL de-reference protection in MFD core
- Remove superfluous function fd_platform_add_cell() from MFD core
- Honour Device Tree's request to disable a device
New Drivers:
- Add support for MediaTek MT6323 PMIC
New Device Support:
- Add support for Gemini Lake to Intel LPSS PCI
- Add support for Cherry Trail Crystal Cover PMIC to Intel SoC PMIC
CRC
- Add support for PM{I}8950 to Qualcomm SPMI PMIC
- Add support for U8420 to ST-Ericsson DB8500
- Add support for Comet Lake PCH-H to Intel LPSS PCI
New Functionality:
- Add support for requested supply clocks; madera-core
Fix-ups:
- Lower interrupt priority; rk808
- Use provided helpers (macros, group functions, defines); rk808,
ipaq-micro, ab8500-core, db8500-prcmu, mt6397-core, cs5535-mfd
- Only allocate IRQs on request; max77620
- Use simplified API; arizona-core
- Remove redundant and/or duplicated code; wm8998-tables, arizona,
syscon
- Device Tree binding fix-ups; madera, max77650, max77693
- Remove mfd_cell->id abuse hack; cs5535-mfd
- Remove only user of mfd_clone_cell(); cs5535-mfd
- Make resources static; rohm-bd70528
Bug Fixes:
- Fix product ID for RK818; rk808
- Fix Power Key; rk808
- Fix booting on the BananaPi; mt6397-core
- Endian fix-ups; twl.h
- Fix static error checker warnings; ti_am335x_tscadc"
* tag 'mfd-next-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (47 commits)
Revert "mfd: syscon: Set name of regmap_config"
mfd: ti_am335x_tscadc: Fix static checker warning
mfd: bd70528: Staticize bit value definitions
mfd: mfd-core: Honour Device Tree's request to disable a child-device
dt-bindings: mfd: max77693: Fix missing curly brace
mfd: intel-lpss: Add Intel Comet Lake PCH-H PCI IDs
mfd: db8500-prcmu: Support U8420-sysclk firmware
dt-bindings: mfd: max77650: Convert the binding document to yaml
mfd: mfd-core: Move pdev->mfd_cell creation back into mfd_add_device()
mfd: mfd-core: Remove usage counting for .{en,dis}able() call-backs
x86: olpc-xo1-sci: Remove invocation of MFD's .enable()/.disable() call-backs
x86: olpc-xo1-pm: Remove invocation of MFD's .enable()/.disable() call-backs
mfd: mfd-core: Remove mfd_clone_cell()
mfd: mfd-core: Protect against NULL call-back function pointer
mfd: cs5535-mfd: Register clients using their own dedicated MFD cell entries
mfd: cs5535-mfd: Request shared IO regions centrally
mfd: cs5535-mfd: Remove mfd_cell->id hack
mfd: cs5535-mfd: Use PLATFORM_DEVID_* defines and tidy error message
mfd: intel_soc_pmic_crc: Add "cht_crystal_cove_pmic" cell to CHT cells
mfd: madera: Add support for requesting the supply clocks
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Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail
variant of the Crystal Cove PMIC. Adding this cell enables / hooks-up
the new Cherry Trail Crystal Cove PMIC OpRegion driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Our current Crystal Cove OpRegion driver is only valid for the
Crystal Cove PMIC variant found on Bay Trail (BYT) boards,
Cherry Trail (CHT) based boards use another variant.
At least the regulator registers are different on CHT and these registers
are one of the things controlled by the custom PMIC OpRegion.
Commit 4d9ed62ab142 ("mfd: intel_soc_pmic: Export separate mfd-cell
configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT
devices by removing the "crystal_cove_pmic" MFD cell on CHT devices.
This commit renames the intel_pmic_crc.c driver and the cell to be
prefixed with "byt" to indicate that this code is for BYT devices only.
This is a preparation patch for adding a separate PMIC OpRegion
driver for the CHT variant of the Crystal Cove PMIC (sometimes called
Crystal Cove Plus in Android kernel sources).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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1;5201;0c
Reduce size of duplicated comments by switching to use SPDX identifier.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Sort headers alphabetically for better maintenance.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Instead of open coding each data structure with regmap IRQresources,
use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Instead of open coding each data structure with IRQ resources,
use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Both Bay and Cherry Trail devices may be used together with a Crystal Cove
PMIC. Each platform has its own variant of the PMIC, which both use the
same ACPI HID, but they are not 100% compatible.
Looking at the android x86 kernel sources where most of the Crystal Cove
code comes from, it talks about "Valley View", "Bay Trail" and / or BYT
without ever mentioning Cherry Trail, with the exception of the regulator
driver. The Asus Zenfone-2 kernel code has 2 regulator drivers, one
for Crystal Cove and one for what it calls Crystal Cove Plus. The
Crystal Cove Plus regulator driver is the only one to mention Cherry
Trail and that driver uses different register addresses then the
normal (Bay Trail) Crystal Cove regulator driver, showing that at
least the regulator register addresses are different.
The GPIO code should work on both, and the PWM code is known to work on
both and is necessary for backlight control on some Cherry Trail devices.
Testing has shown that the ACPI OpRegion code otoh is causing problems
on Cherry Trail devices, which is not surprising as it deals with the
regulators and those have different register addresses on CHT.
Specifically the ACPI OpRegion code causes the external microsd slot on
a Dell Venue 8 5855 (Cherry Trail version) to not work and the eMMC to
become unreliable and throw lots of errors.
This commit replaces the single mfd_cell array currently used for Crystal
Cove with 2 separate arrays, one for the Bay Trail variant and one for
the Cherry Trail variant, note that the Cherry Trail version of the array
only contains gpio and pwm cells. The PMIC OpRegion cell is deliberately
not included and drivers for the other cells in the Bay Trail cell array
were never upstreamed.
Fixes: 7cf0a66f32 ("mfd: intel_soc_pmic: Crystal Cove support")
Reported-and-tested-by: russianneuromancer <russianneuromancer@ya.ru>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Needed for PWM control suuported by the PMIC
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Constify in various drivers configuration data which is not modified:
- regmap_irq_chip,
- individual regmap_irq's in array,
- regmap_config,
- irq_domain_ops,
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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The Baytrail-T platform firmware has defined two customized operation
regions for PMIC chip Crystal Cove - one is for power resource handling
and one is for thermal: sensor temperature reporting, trip point setting,
etc. This patch adds support for them on top of the existing Crystal Cove
PMIC driver.
The reason to split code into a separate file intel_pmic.c is that there
are more PMIC drivers with ACPI operation region support coming and we can
re-use those code. The intel_pmic_opregion_data structure is created also
for this purpose: when we need to support a new PMIC's operation region,
we just need to fill those callbacks and the two register mapping tables.
Signed-off-by: Aaron Lu <aaron.lu@intel.com>
Acked-by: Lee Jones <lee.jones@linaro.org> for the MFD part
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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This patch provides chip-specific support for Crystal Cove. Crystal
Cove is the PMIC in Baytrail-T platform.
Also adds Intel SoC PMIC support to the build files.
Signed-off-by: Yang, Bin <bin.yang@intel.com>
Signed-off-by: Zhu, Lejun <lejun.zhu@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Linus Torvalds
Hans de Goede
Andy Shevchenko
Shobhit Kumar
Krzysztof Kozlowski
Krzysztof Kozlowski
Aaron Lu
Zhu, Lejun