summaryrefslogtreecommitdiffstats
path: root/drivers/iommu
AgeCommit message (Expand)Author
2020-04-13iommu/vt-d: Allow devices with RMRRs to use identity domainLu Baolu
2020-04-01iommu/vt-d: Populate debugfs if IOMMUs are detectedMegha Dey
2020-04-01iommu/vt-d: Fix debugfs register readsMegha Dey
2020-04-01iommu/vt-d: Silence RCU-list debugging warningsQian Cai
2020-03-18iommu/amd: Fix IOMMU AVIC not properly update the is_run bit in IRTESuravee Suthikulpanit
2020-03-18iommu/vt-d: Ignore devices with out-of-spec domain numberDaniel Drake
2020-03-18iommu/vt-d: Fix the wrong printing in RHSA parsingZhenzhong Duan
2020-03-18iommu/vt-d: Fix RCU-list bugs in intel_iommu_init()Qian Cai
2020-03-18iommu/vt-d: Fix a bug in intel_iommu_iova_to_phys() for huge pageYonghyun Hwang
2020-03-18iommu/vt-d: dmar: replace WARN_TAINT with pr_warn + add_taintHans de Goede
2020-03-18iommu/dma: Fix MSI reservation allocationMarc Zyngier
2020-03-18iommu/vt-d: quirk_ioat_snb_local_iommu: replace WARN_TAINT with pr_warn + add...Hans de Goede
2020-03-12iommu/amd: Disable IOMMU on Stoney Ridge systemsKai-Heng Feng
2020-02-28iommu/qcom: Fix bogus detach logicRobin Murphy
2020-02-24iommu/vt-d: Remove unnecessary WARN_ON_ONCE()Lu Baolu
2020-02-24iommu/arm-smmu-v3: Use WRITE_ONCE() when changing validity of an STEWill Deacon
2020-02-24iommu/vt-d: Avoid sending invalid page responseJacob Pan
2020-02-24iommu/vt-d: Match CPU and IOMMU paging modeJacob Pan
2020-02-24iommu/iova: Silence warnings under memory pressureQian Cai
2020-02-24iommu/amd: Only support x2APIC with IVHD type 11h/40hSuravee Suthikulpanit
2020-02-24iommu/amd: Check feature support bit before accessing MSI capability registersSuravee Suthikulpanit
2020-02-24PCI: Add nr_devfns parameter to pci_add_dma_alias()James Sewart
2020-02-24iommu/vt-d: Fix off-by-one in PASID allocationJacob Pan
2020-02-14iommu/arm-smmu-v3: Populate VMID field for CMDQ_OP_TLBI_NH_VAShameer Kolothum
2020-02-01iommu/amd: Support multiple PCI DMA aliases in IRQ RemappingLogan Gunthorpe
2020-02-01iommu/amd: Support multiple PCI DMA aliases in device tableLogan Gunthorpe
2020-02-01iommu/dma: fix variable 'cookie' set but not usedQian Cai
2020-01-29iommu/amd: Fix IOMMU perf counter clobbering during initShuah Khan
2020-01-29iommu/vt-d: Call __dmar_remove_one_dev_info with valid pointerJerry Snitselaar
2020-01-17iommu/mediatek: Add a new tlb_lock for tlb_flushYong Wu
2020-01-17iommu/mediatek: Correct the flush_iotlb_all callbackYong Wu
2020-01-17iommu: Remove device link to group on failureJon Derrick
2020-01-17iommu/vt-d: Unlink device if failed to add to groupJon Derrick
2020-01-14iommu/vt-d: Fix adding non-PCI devices to Intel IOMMUPatrick Steinhardt
2020-01-12iommu/dma: Relax locking in iommu_dma_prepare_msi()Robin Murphy
2020-01-12iommu/iova: Init the struct iova to fix the possible memleakXiaotao Yin
2020-01-09iommu/vt-d: Remove incorrect PSI capability checkLu Baolu
2020-01-04iommu/arm-smmu-v3: Don't display an error when IRQ lines are missingJean-Philippe Brucker
2020-01-04iommu/tegra-smmu: Fix page tables in > 4 GiB memoryThierry Reding
2020-01-04iommu: rockchip: Free domain on .domain_freeEzequiel Garcia
2019-12-31iommu/vt-d: Allocate reserved region for ISA with correct permissionJerry Snitselaar
2019-12-31iommu/vt-d: Set ISA bridge reserved region as relaxableAlex Williamson
2019-12-31iommu/vt-d: Fix dmar pte read access not set errorLu Baolu
2019-12-31iommu: set group default domain before creating direct mappingsJerry Snitselaar
2019-12-31iommu: fix KASAN use-after-free in iommu_insert_resv_regionEric Auger
2019-10-30iommu/vt-d: Fix panic after kexec -p for kdumpJohn Donnelly
2019-10-30iommu/amd: Apply the same IVRS IOAPIC workaround to Acer Aspire A315-41Takashi Iwai
2019-10-30iommu/ipmmu-vmsa: Remove dev_err() on platform_get_irq() failureYueHaibing
2019-10-26Merge tag 'dma-mapping-5.4-2' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds
2019-10-18iommu/vt-d: Return the correct dma mask when we are bypassing the IOMMUArvind Sankar
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-19 07:00:55 +0000