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2019-05-27i2c: mlxcpld: Fix wrong initialization order in probeVadim Pasternak
Fix wrong order in probing routine initialization - field `base_addr' is used before it's initialized. Move assignment of 'priv->base_addr` to the beginning, prior the call to mlxcpld_i2c_read_comm(). Wrong order caused the first read of capability register to be executed at wrong offset 0x0 instead of 0x2000. By chance it was a "good garbage" at 0x0 offset. Fixes: 313ce648b5a4 ("i2c: mlxcpld: Add support for extended transaction length for i2c-mlxcpld") Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2018-04-30i2c: mlxcpld: Allow configurable adapter id for mlxcpldMichael Shych
It allows mlxcpld driver to be connected to pre-defined adapter number equal or greater than one, in order to avoid current limitation, assuming usage of id number one only. Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30i2c: mlxcpld: Fix adapter functionality support callbackMichael Shych
It fixes report about supported functionality. Functionality can be different up to CPLD capability. Fixes: 6bec23bff9149 (i2c: mlxcpld: add master driver for mellanox systems) Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30i2c: mlxcpld: Add support for smbus block read transactionMichael Shych
It adds support for smbus block read transaction. CPLD smbus block read bit of capability register is verified during driver initialization, and driver data is updated if such capability is available. In case an upper layer requests a read transaction of length one and expects that length will be the first received byte, driver will notify CPLD about SMBus block read transaction flavor, so CPLD will know to execute such kind of transaction. Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30i2c: mlxcpld: Add support for extended transaction length for i2c-mlxcpldMichael Shych
It adds support for extended length of read and write transactions. New CPLD logic allows double size of the read and write transactions length. This feature is verified through capability register, which is renamed from unclear LPF_REG to CPBLTY_REG. Two bits 5 and 6 of these register are used for length capability detection, while only 01 combination indicates support of extended transaction length. Others mean lack of such support. Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_adapter_quirks constBhumika Goyal
Make these const as they are only stored as a reference in the quirks field of an i2c_adapter structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: mlxcpld: add master driver for mellanox systemsVadim Pasternak
Device driver for Mellanox I2C controller logic, implemented in Lattice CPLD device. Device supports: - Master mode - One physical bus - Polling mode The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_MLXCPLD Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>