summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_ddi.c
AgeCommit message (Expand)Author
2018-12-03drm/i915/icl: Add get config functionality for DSIVandita Kulkarni
2018-12-03drm/i915/icl: Sanitize DDI port clock gating for DSI portsImre Deak
2018-12-03drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooksJani Nikula
2018-11-29drm/i915/fec: Disable FEC state.Anusha Srivatsa
2018-11-29i915/dp/fec: Configure the Forward Error Correction bits.Anusha Srivatsa
2018-11-29drm/i915/fec: Set FEC_READY in FEC_CONFIGURATIONAnusha Srivatsa
2018-11-29drm/i915/dsc: Enable and disable appropriate power wells for VDSCManasi Navare
2018-11-29drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enablingManasi Navare
2018-11-29drm/i915/dp: Enable/Disable DSC in DP SinkGaurav K Singh
2018-11-21drm/i915: Make CHICKEN_TRANS reg not depend on enum valueImre Deak
2018-11-15drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()Jani Nikula
2018-11-09drm/i915/icl: Fix PLL mapping sanitization for DP portsImre Deak
2018-11-09drm/i915/ddi: Add more sanity check to the encoder HW readoutImre Deak
2018-11-05drm/i915/icl: Configure MG DP mode for HDMI ports tooImre Deak
2018-11-05drm/i915/icl: Configure MG PHY gating for HDMI ports tooImre Deak
2018-11-02drm/i915/icl+: Sanitize port to PLL mappingImre Deak
2018-11-02drm/i915: Enable AUX power for HDMI DDI/TypeC main link tooImre Deak
2018-11-02drm/i915: Enable AUX power earlierImre Deak
2018-11-02drm/i915: Use a helper to get the aux power domainImre Deak
2018-11-02drm/i915: Init aux_ch for HDMI ports tooImre Deak
2018-11-02drm/i915: Move aux_ch to intel_digital_portImre Deak
2018-10-31drm/i915/ICL: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hookManasi Navare
2018-10-22drm/i915: compute_min_voltage_level sort platforms newer-to-olderRodrigo Vivi
2018-10-22drm/i915: ddi_clock_get sort platforms newer-to-older.Rodrigo Vivi
2018-10-16drm/i915/icl: Fix DDI/TC port clk_off bitsMahesh Kumar
2018-10-16drm/i915/icl: create function to identify combophy portMahesh Kumar
2018-10-15drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCONShashank Sharma
2018-10-15drm/i915: Add AVI infoframe support for LSPCONShashank Sharma
2018-10-15drm/i915: Add CRTC output format YCBCR 4:2:0Shashank Sharma
2018-10-05drm/i915: Apply correct ddi translation table for AML deviceLee, Shawn C
2018-10-05drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_selMaarten Lankhorst
2018-10-01drm/i915: Pass intel_encoder to infoframe functionsVille Syrjälä
2018-09-25drm/i915: use for_each_pipe loop to assign crtc_maskMahesh Kumar
2018-09-18drm/i915/psr: Enable AUX-A IO power well on ICL for PSRDhinakaran Pandiyan
2018-09-04drm/i915: Fix ICL+ HDMI clock readoutVille Syrjälä
2018-09-01drm/i915/dp_mst: Fix enabling pipe clock for all streamsImre Deak
2018-08-20drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLLManasi Navare
2018-08-14drm/i915: set DP Main Stream Attribute for color range on DDI platformsJani Nikula
2018-07-25drm/i915/icl: toggle PHY clock gating around link trainingPaulo Zanoni
2018-07-25drm/i915/icl: program MG_DP_MODEPaulo Zanoni
2018-07-24drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDIManasi Navare
2018-07-13drm/i915: Nuke dev_priv->irq_port[]Ville Syrjälä
2018-07-13drm/i915/glk: Add Quirk for GLK NUC HDMI port issues.Clint Taylor
2018-07-06drm/i915/ddi: Simplify get_encoder_power_domains()Imre Deak
2018-07-05drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva
2018-06-26drm/i915/ddi: Get AUX power domain for DP main link tooImre Deak
2018-06-15drm/i915/icl: implement DVFS for ICLPaulo Zanoni
2018-06-14drm/i915/icl: start adding the TBT pllPaulo Zanoni
2018-06-14drm/i915/ddi: Set HDMI infoframes with pipe clocks enabledImre Deak
2018-06-14drm/i915/ddi: Push pipe clock enabling to encodersImre Deak