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path: root/drivers/gpu/drm/i915/display/intel_display_power.h
AgeCommit message (Expand)Author
2020-02-26drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper
2020-02-05drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy
2019-12-23drm/i915: fix comment for POWER_DOMAIN_TRANSCODER_VDSC_PW2Jani Nikula
2019-10-08drm/i915/tgl: Switch between dc3co and dc5 based on display idlenessAnshuman Gupta
2019-10-08drm/i915/tgl: Enable DC3CO state in "DC Off" power wellAnshuman Gupta
2019-08-28drm/i915: Align power domain names with port namesImre Deak
2019-08-16drm/i915: Move i915_power_well_id out of i915_reg.hDaniele Ceraolo Spurio
2019-08-07drm/i915: abstract display suspend/resume operationsRodrigo Vivi
2019-07-12drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik
2019-07-11drm/i915/tgl: Add power well to support 4th pipeMika Kahola
2019-07-11drm/i915/tgl: Add power well supportImre Deak
2019-07-11drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza
2019-07-05drm/i915/ehl: Add support for DPLL4 (v10)Vivek Kasireddy
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula
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