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path: root/drivers/cxl/acpi.c
AgeCommit message (Expand)Author
2023-11-28cxl: Unify debug messages when calling devm_cxl_add_port()Robert Richter
2023-08-03cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()Breno Leitao
2023-08-03cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()Breno Leitao
2022-08-01cxl/acpi: Minimize granularity for x1 interleavesDan Williams
2022-08-01cxl/acpi: Autoload driver for 'cxl_acpi' test devicesDan Williams
2022-07-21cxl/port: Record parent dport when adding portsDan Williams
2022-07-21cxl/core: Define a 'struct cxl_root_decoder'Dan Williams
2022-07-21cxl/acpi: Track CXL resources in iomem_resourceDan Williams
2022-07-21cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams
2022-07-09cxl: Introduce cxl_to_{ways,granularity}Dan Williams
2022-07-09cxl/core: Drop ->platform_res attribute for root decodersDan Williams
2022-04-28cxl/acpi: Add root device lockdep validationDan Williams
2022-02-08cxl/core/port: Fix / relax decoder target enumerationDan Williams
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky
2022-02-08cxl/core/port: Add switch port enumerationDan Williams
2022-02-08cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams
2022-02-08cxl/pci: Rename pci.h to cxlpci.hDan Williams
2022-02-08cxl/port: Up-level cxl_add_dport() locking requirements to the callerDan Williams
2022-02-08cxl/port: Introduce cxl_port_to_pci_bus()Dan Williams
2022-02-08cxl: Prove CXL lockingDan Williams
2022-02-08cxl/core/port: Make passthrough decoder init implicitBen Widawsky
2022-02-08cxl/core/port: Clarify decoder creationBen Widawsky
2022-02-08cxl/core: Convert decoder range to resourceBen Widawsky
2022-02-08cxl/acpi: Map component registers for Root PortsBen Widawsky
2021-11-15ACPI: NUMA: Add a node and memblk for each CFMWS not in SRATAlison Schofield
2021-11-15cxl/test: Mock acpi_table_parse_cedt()Dan Williams
2021-11-15cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpersDan Williams
2021-10-08cxl/acpi: Do not fail cxl_acpi_probe() based on a missing CHBSAlison Schofield
2021-09-21cxl/core: Split decoder setup into alloc + addDan Williams
2021-09-21cxl/bus: Populate the target list at decoder createDan Williams
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams
2021-09-07cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge portsAlison Schofield
2021-06-17cxl/acpi: Use the ACPI CFMWS to create static decoder objectsAlison Schofield
2021-06-17cxl/acpi: Add the Host Bridge base address to CXL port objectsAlison Schofield
2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams
2021-06-09cxl/acpi: Introduce cxl_decoder objectsDan Williams
2021-06-09cxl/acpi: Enumerate host bridge root portsDan Williams
2021-06-09cxl/acpi: Add downstream port data to cxl_port instancesDan Williams
2021-06-09cxl/acpi: Introduce the root of a cxl_port topologyDan Williams
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