aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/socfpga
AgeCommit message (Expand)Author
2023-01-14clk: socfpga: Fix memory leak in socfpga_gate_init()Xiu Jianfeng
2023-01-14clk: socfpga: use clk_hw_register for a5/c5Dinh Nguyen
2023-01-14clk: socfpga: clk-pll: Remove unused variable 'rc'Lee Jones
2021-10-20clk: socfpga: agilex: fix duplicate s2f_user0_clkDinh Nguyen
2021-09-18clk: socfpga: agilex: add the bypass register for s2f_usr0 clockDinh Nguyen
2021-09-18clk: socfpga: agilex: fix up s2f_user0_clk representationDinh Nguyen
2021-09-18clk: socfpga: agilex: fix the parents of the psi_ref_clkDinh Nguyen
2021-07-14clk: agilex/stratix10: fix bypass representationDinh Nguyen
2021-07-14clk: agilex/stratix10: remove noc_clkDinh Nguyen
2021-07-14clk: agilex/stratix10/n5x: fix how the bypass_reg is handledDinh Nguyen
2021-05-11clk: socfpga: arria10: Fix memory leak of socfpga_clk on error returnColin Ian King
2021-04-14clk: socfpga: fix iomem pointer cast on 64-bitKrzysztof Kozlowski
2020-10-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2020-09-22clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clkDinh Nguyen
2020-09-22clk: socfpga: agilex: Remove unused variable 'cntr_mux'YueHaibing
2020-06-19clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clkDinh Nguyen
2020-06-19clk: socfpga: agilex: add nand_x_clk and nand_ecc_clkDinh Nguyen
2020-05-26clk: socfpga: agilex: add clock driver for the Agilex platformDinh Nguyen
2020-05-26clk: socfpga: add const to _ops data structuresDinh Nguyen
2020-05-26clk: socfpga: remove clk_ops enable/disable methodsDinh Nguyen
2020-05-26clk: socfpga: stratix10: use new parent data schemeDinh Nguyen
2020-02-12clk: socfpga: stratix10: simplify parameter passingDinh Nguyen
2020-02-12clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen
2019-09-20Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2019-08-16clk: socfpga: deindent code to proper indentationStephen Boyd
2019-08-16clk: socfpga: Don't reference clk_init_data after registrationStephen Boyd
2019-08-14clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2019-06-28Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen
2019-06-25clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-03-08Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', ...Stephen Boyd
2019-01-24clk: socfpga: Don't have get_parent for single parent opsStephen Boyd
2019-01-15clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen
2019-01-11clk: socfpga: stratix10: fix rate calculation for pll clocksDinh Nguyen
2018-12-28clk: socfpga: fix refcount leakYangtao Li
2018-07-06clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen
2018-07-06clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen
2018-05-15clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen
2018-05-15clk: socfpga: stratix10: use platform driver APIsDinh Nguyen
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen
2016-02-22clk: socfpga: allow for multiple parents on Arria10 periph clocksDinh Nguyen
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-07-01 22:31:27 +0000