| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-10-16 | clk: renesas: r8a77995: Correct parent clock of INTC-AP |   Geert Uytterhoeven | |
| According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017, the parent clock of the INTC-AP module clock on R-Car D3 is S1D2. This change has no functional impact. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> | |||
| 2017-08-16 | clk: renesas: cpg-mssr: Add R8A77995 support | Geert Uytterhoeven | |
| Add R-Car D3 (R8A77995) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen3 CPG code. Based on the R-Car Series, 3rd Generation Hardware User's Manual, Rev. 0.55, Jun. 30, 2017. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> | |||
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