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AgeCommit message (Expand)Author
2023-04-05riscv: Bump COMMAND_LINE_SIZE value to 1024Alexandre Ghiti
2023-03-11RISC-V: time: initialize hrtimer based broadcast clock event deviceConor Dooley
2023-02-22riscv: Fixup race condition on PG_dcache_clean in flush_icache_pteGuo Ren
2023-02-22riscv: disable generation of unwind tablesAndreas Schwab
2023-02-06exit: Add and use make_task_dead.Eric W. Biederman
2023-01-18riscv: uaccess: fix type of 0 variable on error in get_user()Ben Dooks
2022-12-08RISC-V: vdso: Do not add missing symbols to version section in linker scriptNathan Chancellor
2022-11-25riscv: process: fix kernel info leakageJisheng Zhang
2022-10-26riscv: fix build with binutils 2.38Aurelien Jarno
2022-10-26riscv: Allow PROT_WRITE-only mmap()Andrew Bresticker
2022-08-25RISC-V: Add fast call path of crash_kexec()Xianting Tian
2022-08-25riscv: mmap with PROT_WRITE but no PROT_READ is invalidCeleste Liu
2022-07-29riscv: add as-options for modules with assembly compontentsBen Dooks
2022-06-25RISC-V: fix barrier() use in <vdso/processor.h>Randy Dunlap
2022-04-15riscv module: remove (NOLOAD)Fangrui Song
2022-03-16riscv: Fix auipc+jalr relocation range checksEmil Renner Berthing
2021-11-06arch: pgtable: define MAX_POSSIBLE_PHYSMEM_BITS where neededArnd Bergmann
2021-09-26drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()Thomas Gleixner
2021-05-22riscv: Workaround mcount name prior to clang-13Nathan Chancellor
2021-04-16riscv,entry: fix misaligned base for excp_vect_tableZihao Yu
2021-02-23riscv: virt_addr_valid must check the address belongs to linear mappingAlexandre Ghiti
2021-01-27riscv: Fix kernel time_init()Damien Le Moal
2020-11-05riscv: Define AT_VECTOR_SIZE_ARCH for ARCH_DLINFOZong Li
2020-10-01RISC-V: Take text_mutex in ftrace_init_nop()Palmer Dabbelt
2020-07-29RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorwPalmer Dabbelt
2020-07-22riscv: use 16KB kernel stack on 64-bitAndreas Schwab
2020-06-30RISC-V: Don't allow write+exec only page mapping request in mmapYash Shah
2020-06-30riscv/atomic: Fix sign extension for RV64INathan Huckleberry
2020-06-03riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang
2020-05-27riscv: set max_pfn to the PFN of the last pageVincent Chen
2020-05-20riscv: fix vdso build with lldIlie Halip
2020-03-25riscv: avoid the PIC offset of static percpu data in module beyond 2G limitsVincent Chen
2020-02-05riscv: delete temporary filesIlie Halip
2020-01-09riscv: ftrace: correct the condition logic in function graph tracerZong Li
2019-12-01RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremapVincent Chen
2019-10-11riscv: Avoid interrupts being erroneously enabled in handle_exception()Vincent Chen
2019-09-16riscv: remove unused variable in ftraceDavid Abdurachmanov
2019-08-25riscv: Make __fstate_clean() work correctly.Vincent Chen
2019-07-14riscv: Fix udelay in RV32.Nick Hu
2019-06-25riscv: mm: synchronize MMU after pte changeShihPo Hung
2019-05-08riscv: fix accessing 8-byte variable from RV32Alan Kao
2019-04-17riscv: Fix syscall_get_arguments() and syscall_set_arguments()Dmitry V. Levin
2019-03-13riscv: Adjust mmap base address at a third of task sizeAlexandre Ghiti
2019-03-13riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren
2019-02-20riscv: Add pte bit to distinguish swap from invalidStefan O'Rear
2019-02-20riscv: fix trace_sys_exit hookDavid Abdurachmanov
2018-12-13riscv: fix warning in arch/riscv/include/asm/module.hDavid Abdurachmanov
2018-12-05riscv/function_graph: Simplify with function_graph_enter()Steven Rostedt (VMware)
2018-12-01RISC-V: Silence some module warnings on 32-bitOlof Johansson
2018-12-01riscv: add missing vdso_install targetDavid Abdurachmanov